[U-Boot] [PATCH] sh: Add support for ecovec board
Nobuhiro Iwamatsu
iwamatsu at nigauri.org
Thu Nov 24 03:02:17 CET 2011
Applied, thanks.
Best regards,
Nobuhiro
2011/11/15 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>:
> The ecovec board has SH7724, 256MB DDR2-SDRAM, USB,
> Ethernet, and more.
>
> This patch supports the following functions:
> - 256MB DDR2-SDRAM
> - USB
> - I2C
> - Ethernet
>
> Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
> ---
> MAINTAINERS | 1 +
> board/renesas/ecovec/Makefile | 38 ++++++
> board/renesas/ecovec/ecovec.c | 124 ++++++++++++++++++++
> board/renesas/ecovec/lowlevel_init.S | 211 ++++++++++++++++++++++++++++++++++
> boards.cfg | 1 +
> include/configs/ecovec.h | 200 ++++++++++++++++++++++++++++++++
> 6 files changed, 575 insertions(+), 0 deletions(-)
> create mode 100644 board/renesas/ecovec/Makefile
> create mode 100644 board/renesas/ecovec/ecovec.c
> create mode 100644 board/renesas/ecovec/lowlevel_init.S
> create mode 100644 include/configs/ecovec.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index f5168b0..61c6527 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -1034,6 +1034,7 @@ Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
> RSK7203 SH7203
> AP325RXA SH7723
> SHMIN SH7706
> + ECOVEC SH7724
>
> Mark Jonas <mark.jonas at de.bosch.com>
>
> diff --git a/board/renesas/ecovec/Makefile b/board/renesas/ecovec/Makefile
> new file mode 100644
> index 0000000..8fdc0c9
> --- /dev/null
> +++ b/board/renesas/ecovec/Makefile
> @@ -0,0 +1,38 @@
> +#
> +# Copyright (C) 2011 Nobuhiro Iwamatsu <iwamatsu at nigauri.org>
> +# Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
> +#
> +# This program is free software; you can redistribute it and/or
> +# modify it under the terms of the GNU General Public License as
> +# published by the Free Software Foundation; either version 2 of
> +# the License, or (at your option) any later version.
> +#
> +# This program is distributed in the hope that it will be useful,
> +# but WITHOUT ANY WARRANTY; without even the implied warranty of
> +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> +# GNU General Public License for more details.
> +#
> +# You should have received a copy of the GNU General Public License
> +# along with this program; if not, write to the Free Software
> +# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> +# MA 02111-1307 USA
> +
> +
> +include $(TOPDIR)/config.mk
> +
> +LIB = $(obj)lib$(BOARD).o
> +
> +COBJS := ecovec.o
> +SOBJS := lowlevel_init.o
> +
> +$(LIB): $(obj).depend $(COBJS) $(SOBJS)
> + $(call cmd_link_o_target, $(COBJS) $(SOBJS))
> +
> +#########################################################################
> +
> +# defines $(obj).depend target
> +include $(SRCTREE)/rules.mk
> +
> +sinclude $(obj).depend
> +
> +#########################################################################
> diff --git a/board/renesas/ecovec/ecovec.c b/board/renesas/ecovec/ecovec.c
> new file mode 100644
> index 0000000..275b0ba
> --- /dev/null
> +++ b/board/renesas/ecovec/ecovec.c
> @@ -0,0 +1,124 @@
> +/*
> + * Copyright (C) 2009, 2011 Renesas Solutions Corp.
> + * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori at renesas.com>
> + * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <command.h>
> +#include <asm/io.h>
> +#include <asm/processor.h>
> +#include <i2c.h>
> +#include <netdev.h>
> +
> +/* USB power management register */
> +#define UPONCR0 0xA40501D4
> +
> +int checkboard(void)
> +{
> + puts("BOARD: ecovec\n");
> + return 0;
> +}
> +
> +int dram_init(void)
> +{
> + DECLARE_GLOBAL_DATA_PTR;
> +
> + gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
> + gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
> + printf("DRAM: %dMB\n", CONFIG_SYS_SDRAM_SIZE / (1024 * 1024));
> + return 0;
> +}
> +
> +static void debug_led(u8 led)
> +{
> + /* PDGR[0-4] is debug LED */
> + outb((inb(PGDR) & ~0x0F) | (led & 0x0F), PGDR);
> +}
> +
> +int board_late_init(void)
> +{
> + u8 mac[6];
> + char env_mac[17];
> + int i;
> +
> + udelay(1000);
> +
> + /* SH-Eth (PLCR, PNCR, PXCR, PSELx )*/
> + outw(inw(PLCR) & ~0xFFF0, PLCR);
> + outw(inw(PNCR) & ~0x000F, PNCR);
> + outw(inw(PXCR) & ~0x0FC0, PXCR);
> + outw((inw(PSELB) & ~0x030F) | 0x020A, PSELB);
> + outw((inw(PSELC) & ~0x0307) | 0x0207, PSELC);
> + outw((inw(PSELE) & ~0x00c0) | 0x0080, PSELE);
> +
> + debug_led(1 << 3);
> +
> + outl(inl(MSTPCR2) & ~0x10000000, MSTPCR2);
> +
> + i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
> + i2c_set_bus_num(CONFIG_SYS_I2C_MODULE); /* Use I2C 1 */
> +
> + /* Read MAC address */
> + i2c_read(0x50, 0x10, 0, mac, 6);
> +
> + /* Set MAC address */
> + sprintf(env_mac, "%02X:%02X:%02X:%02X:%02X:%02X",
> + mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
> + setenv("ethaddr", env_mac);
> +
> + debug_led(0x0F);
> +
> + return 0;
> +}
> +
> +int board_init(void)
> +{
> +
> + /* LED (PTG) */
> + outw((inw(PGCR) & ~0xFF) | 0x66, PGCR);
> + outw((inw(HIZCRA) & ~0x02), HIZCRA);
> +
> + debug_led(1 << 0);
> +
> + /* SCIF0 (PTF, PTM) */
> + outw(inw(PFCR) & ~0x30, PFCR);
> + outw(inw(PMCR) & ~0x0C, PMCR);
> + outw((inw(PSELA) & ~0x40) | 0x40, PSELA);
> +
> + debug_led(1 << 1);
> +
> + /* RMII (PTA) */
> + outw((inw(PACR) & ~0x0C) | 0x04, PACR);
> + outb((inb(PADR) & ~0x02) | 0x02, PADR);
> +
> + debug_led(1 << 2);
> +
> + /* USB host */
> + outw((inw(PBCR) & ~0x300) | 0x100, PBCR);
> + outb((inb(PBDR) & ~0x10) | 0x10, PBDR);
> + outl(inl(MSTPCR2) & 0x100000, MSTPCR2);
> + outw(0x0600, UPONCR0);
> +
> + debug_led(1 << 3);
> +
> + /* debug switch */
> + outw((inw(PVCR) & ~0x03) | 0x02 , PVCR);
> +
> + return 0;
> +}
> diff --git a/board/renesas/ecovec/lowlevel_init.S b/board/renesas/ecovec/lowlevel_init.S
> new file mode 100644
> index 0000000..9fc63e0
> --- /dev/null
> +++ b/board/renesas/ecovec/lowlevel_init.S
> @@ -0,0 +1,211 @@
> +/*
> + * Copyright (C) 2011 Renesas Solutions Corp.
> + * Copyright (C) 2011 Nobuhiro Iwamatsu <nobuhiro.Iwamatsu.yj at renesas.com>
> + *
> + * board/renesas/ecovec/lowlevel_init.S
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <config.h>
> +#include <version.h>
> +#include <asm/processor.h>
> +#include <asm/macro.h>
> +#include <configs/ecovec.h>
> +
> + .global lowlevel_init
> +
> + .text
> + .align 2
> +
> +lowlevel_init:
> +
> + /* jump to 0xA0020000 if bit 1 of PVDR_A */
> + mov.l PVDR_A, r1
> + mov.l PVDR_D, r2
> + mov.b @r1, r0
> + tst r0, r2
> + bt 1f
> + mov.l JUMP_A, r1
> + jmp @r1
> + nop
> +
> +1:
> + /* Disable watchdog */
> + write16 RWTCSR_A, RWTCSR_D
> +
> + /* MMU Disable */
> + write32 MMUCR_A, MMUCR_D
> +
> + /* Setup clocks */
> + write32 PLLCR_A, PLLCR_D
> + write32 FRQCRA_A, FRQCRA_D
> + write32 FRQCRB_A, FRQCRB_D
> +
> + wait_timer TIMER_D
> +
> + write32 MMSELR_A, MMSELR_D
> +
> + /* Srtup BSC */
> + write32 CMNCR_A, CMNCR_D
> + write32 CS0BCR_A, CS0BCR_D
> + write32 CS0WCR_A, CS0WCR_D
> +
> + wait_timer TIMER_D
> +
> + /* Setup SDRAM */
> + write32 DBPDCNT0_A, DBPDCNT0_D0
> + write32 DBCONF_A, DBCONF_D
> + write32 DBTR0_A, DBTR0_D
> + write32 DBTR1_A, DBTR1_D
> + write32 DBTR2_A, DBTR2_D
> + write32 DBTR3_A, DBTR3_D
> + write32 DBKIND_A, DBKIND_D
> + write32 DBCKECNT_A, DBCKECNT_D
> +
> + wait_timer TIMER_D
> +
> + write32 DBCMDCNT_A, DBCMDCNT_D0
> + write32 DBMRCNT_A, DBMRCNT_D0
> + write32 DBMRCNT_A, DBMRCNT_D1
> + write32 DBMRCNT_A, DBMRCNT_D2
> + write32 DBMRCNT_A, DBMRCNT_D3
> + write32 DBCMDCNT_A, DBCMDCNT_D0
> + write32 DBCMDCNT_A, DBCMDCNT_D1
> + write32 DBCMDCNT_A, DBCMDCNT_D1
> + write32 DBMRCNT_A, DBMRCNT_D4
> + write32 DBMRCNT_A, DBMRCNT_D5
> + write32 DBMRCNT_A, DBMRCNT_D6
> +
> + wait_timer TIMER_D
> +
> + write32 DBEN_A, DBEN_D
> + write32 DBRFPDN1_A, DBRFPDN1_D
> + write32 DBRFPDN2_A, DBRFPDN2_D
> + write32 DBCMDCNT_A, DBCMDCNT_D0
> +
> +
> + /* Dummy read */
> + mov.l DUMMY_A ,r1
> + synco
> + mov.l @r1, r0
> + synco
> +
> + mov.l SDRAM_A ,r1
> + synco
> + mov.l @r1, r0
> + synco
> + wait_timer TIMER_D
> +
> + add #4, r1
> + synco
> + mov.l @r1, r0
> + synco
> + wait_timer TIMER_D
> +
> + add #4, r1
> + synco
> + mov.l @r1, r0
> + synco
> + wait_timer TIMER_D
> +
> + add #4, r1
> + synco
> + mov.l @r1, r0
> + synco
> + wait_timer TIMER_D
> +
> + write32 DBCMDCNT_A, DBCMDCNT_D0
> + write32 DBCMDCNT_A, DBCMDCNT_D1
> + write32 DBPDCNT0_A, DBPDCNT0_D1
> + write32 DBRFPDN0_A, DBRFPDN0_D
> +
> + wait_timer TIMER_D
> +
> + write32 CCR_A, CCR_D
> +
> + stc sr, r0
> + mov.l SR_MASK_D, r1
> + and r1, r0
> + ldc r0, sr
> +
> + rts
> +
> + .align 2
> +
> +PVDR_A: .long PVDR
> +PVDR_D: .long 0x00000001
> +JUMP_A: .long CONFIG_ECOVEC_ROMIMAGE_ADDR
> +TIMER_D: .long 64
> +RWTCSR_A: .long RWTCSR
> +RWTCSR_D: .long 0x0000A507
> +MMUCR_A: .long MMUCR
> +MMUCR_D: .long 0x00000004
> +PLLCR_A: .long PLLCR
> +PLLCR_D: .long 0x00004000
> +FRQCRA_A: .long FRQCRA
> +FRQCRA_D: .long 0x8E003508
> +FRQCRB_A: .long FRQCRB
> +FRQCRB_D: .long 0x0
> +MMSELR_A: .long MMSELR
> +MMSELR_D: .long 0xA5A50000
> +CMNCR_A: .long CMNCR
> +CMNCR_D: .long 0x00000013
> +CS0BCR_A: .long CS0BCR
> +CS0BCR_D: .long 0x11110400
> +CS0WCR_A: .long CS0WCR
> +CS0WCR_D: .long 0x00000440
> +DBPDCNT0_A: .long DBPDCNT0
> +DBPDCNT0_D0: .long 0x00000181
> +DBPDCNT0_D1: .long 0x00000080
> +DBCONF_A: .long DBCONF
> +DBCONF_D: .long 0x015B0002
> +DBTR0_A: .long DBTR0
> +DBTR0_D: .long 0x03061502
> +DBTR1_A: .long DBTR1
> +DBTR1_D: .long 0x02020102
> +DBTR2_A: .long DBTR2
> +DBTR2_D: .long 0x01090305
> +DBTR3_A: .long DBTR3
> +DBTR3_D: .long 0x00000002
> +DBKIND_A: .long DBKIND
> +DBKIND_D: .long 0x00000005
> +DBCKECNT_A: .long DBCKECNT
> +DBCKECNT_D: .long 0x00000001
> +DBCMDCNT_A: .long DBCMDCNT
> +DBCMDCNT_D0:.long 0x2
> +DBCMDCNT_D1:.long 0x4
> +DBMRCNT_A: .long DBMRCNT
> +DBMRCNT_D0: .long 0x00020000
> +DBMRCNT_D1: .long 0x00030000
> +DBMRCNT_D2: .long 0x00010040
> +DBMRCNT_D3: .long 0x00000532
> +DBMRCNT_D4: .long 0x00000432
> +DBMRCNT_D5: .long 0x000103C0
> +DBMRCNT_D6: .long 0x00010040
> +DBEN_A: .long DBEN
> +DBEN_D: .long 0x01
> +DBRFPDN0_A: .long DBRFPDN0
> +DBRFPDN1_A: .long DBRFPDN1
> +DBRFPDN2_A: .long DBRFPDN2
> +DBRFPDN0_D: .long 0x00010000
> +DBRFPDN1_D: .long 0x00000613
> +DBRFPDN2_D: .long 0x238C003A
> +SDRAM_A: .long 0xa8000000
> +DUMMY_A: .long 0x0c400000
> +CCR_A: .long CCR
> +CCR_D: .long 0x0000090B
> +SR_MASK_D: .long 0xEFFFFF0F
> diff --git a/boards.cfg b/boards.cfg
> index bccb832..92929bc 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -958,6 +958,7 @@ sh7763rdp sh sh4 sh7763rdp renesas
> sh7785lcr sh sh4 sh7785lcr renesas -
> sh7785lcr_32bit sh sh4 sh7785lcr renesas - sh7785lcr:SH_32BIT=1
> MigoR sh sh4 MigoR renesas -
> +ecovec sh sh4 ecovec renesas -
> grsim_leon2 sparc leon2 - gaisler
> gr_cpci_ax2000 sparc leon3 - gaisler
> gr_ep2s60 sparc leon3 - gaisler
> diff --git a/include/configs/ecovec.h b/include/configs/ecovec.h
> new file mode 100644
> index 0000000..2e2a9a7
> --- /dev/null
> +++ b/include/configs/ecovec.h
> @@ -0,0 +1,200 @@
> +/*
> + * Configuation settings for the Renesas Solutions ECOVEC board
> + *
> + * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
> + * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori at renesas.com>
> + * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj at renesas.com>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#ifndef __ECOVEC_H
> +#define __ECOVEC_H
> +
> +/*
> + * Address Interface BusWidth
> + *-----------------------------------------
> + * 0x0000_0000 U-Boot 16bit
> + * 0x0004_0000 Linux romImage 16bit
> + * 0x0014_0000 MTD for Linux 16bit
> + * 0x0400_0000 Internal I/O 16/32bit
> + * 0x0800_0000 DRAM 32bit
> + * 0x1800_0000 MFI 16bit
> + */
> +
> +#undef DEBUG
> +#define CONFIG_SH 1
> +#define CONFIG_SH4 1
> +#define CONFIG_SH4A 1
> +#define CONFIG_CPU_SH7724 1
> +#define BOARD_LATE_INIT 1
> +#define CONFIG_ECOVEC 1
> +
> +#define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
> +#define CONFIG_SYS_TEXT_BASE 0x8FFC0000
> +
> +#define CONFIG_CMD_FLASH
> +#define CONFIG_CMD_MEMORY
> +#define CONFIG_CMD_NET
> +#define CONFIG_CMD_PING
> +#define CONFIG_CMD_MII
> +#define CONFIG_CMD_NFS
> +#define CONFIG_CMD_SDRAM
> +#define CONFIG_CMD_ENV
> +#define CONFIG_CMD_USB
> +#define CONFIG_CMD_FAT
> +#define CONFIG_CMD_EXT2
> +#define CONFIG_CMD_SAVEENV
> +
> +#define CONFIG_USB_STORAGE
> +#define CONFIG_DOS_PARTITION
> +
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_BOOTDELAY 3
> +#define CONFIG_BOOTARGS "console=ttySC0,115200"
> +
> +#define CONFIG_VERSION_VARIABLE
> +#undef CONFIG_SHOW_BOOT_PROGRESS
> +
> +/* I2C */
> +#define CONFIG_CMD_I2C
> +#define CONFIG_SH_I2C 1
> +#define CONFIG_HARD_I2C 1
> +#define CONFIG_I2C_MULTI_BUS 1
> +#define CONFIG_SYS_MAX_I2C_BUS 2
> +#define CONFIG_SYS_I2C_MODULE 1
> +#define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */
> +#define CONFIG_SYS_I2C_SLAVE 0x7F
> +#define CONFIG_SH_I2C_DATA_HIGH 4
> +#define CONFIG_SH_I2C_DATA_LOW 5
> +#define CONFIG_SH_I2C_CLOCK 41666666
> +#define CONFIG_SH_I2C_BASE0 0xA4470000
> +#define CONFIG_SH_I2C_BASE1 0xA4750000
> +
> +/* Ether */
> +#define CONFIG_NET_MULTI 1
> +#define CONFIG_SH_ETHER 1
> +#define CONFIG_SH_ETHER_USE_PORT (0)
> +#define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
> +#define CONFIG_PHYLIB
> +#define CONFIG_BITBANGMII
> +#define CONFIG_BITBANGMII_MULTI
> +
> +/* USB / R8A66597 */
> +#define CONFIG_USB_R8A66597_HCD
> +#define CONFIG_R8A66597_BASE_ADDR 0xA4D80000
> +#define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */
> +#define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */
> +#define CONFIG_R8A66597_ENDIAN 0x0000 /* little */
> +#define CONFIG_SUPERH_ON_CHIP_R8A66597
> +
> +/* undef to save memory */
> +#define CONFIG_SYS_LONGHELP
> +/* Monitor Command Prompt */
> +#define CONFIG_SYS_PROMPT "=> "
> +/* Buffer size for input from the Console */
> +#define CONFIG_SYS_CBSIZE 256
> +/* Buffer size for Console output */
> +#define CONFIG_SYS_PBSIZE 256
> +/* max args accepted for monitor commands */
> +#define CONFIG_SYS_MAXARGS 16
> +/* Buffer size for Boot Arguments passed to kernel */
> +#define CONFIG_SYS_BARGSIZE 512
> +/* List of legal baudrate settings for this board */
> +#define CONFIG_SYS_BAUDRATE_TABLE { 115200 }
> +
> +/* SCIF */
> +#define CONFIG_SCIF_CONSOLE 1
> +#define CONFIG_SCIF 1
> +#define CONFIG_CONS_SCIF0 1
> +
> +/* Suppress display of console information at boot */
> +#undef CONFIG_SYS_CONSOLE_INFO_QUIET
> +#undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
> +#undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE
> +
> +/* SDRAM */
> +#define CONFIG_SYS_SDRAM_BASE (0x88000000)
> +#define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024)
> +#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
> +
> +#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
> +#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
> +/* Enable alternate, more extensive, memory test */
> +#undef CONFIG_SYS_ALT_MEMTEST
> +/* Scratch address used by the alternate memory test */
> +#undef CONFIG_SYS_MEMTEST_SCRATCH
> +
> +/* Enable temporary baudrate change while serial download */
> +#undef CONFIG_SYS_LOADS_BAUD_CHANGE
> +
> +/* FLASH */
> +#define CONFIG_FLASH_CFI_DRIVER 1
> +#define CONFIG_SYS_FLASH_CFI
> +#undef CONFIG_SYS_FLASH_QUIET_TEST
> +#define CONFIG_SYS_FLASH_EMPTY_INFO
> +#define CONFIG_SYS_FLASH_BASE (0xA0000000)
> +#define CONFIG_SYS_MAX_FLASH_SECT 512
> +
> +/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
> +#define CONFIG_SYS_MAX_FLASH_BANKS 1
> +#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
> +
> +/* Timeout for Flash erase operations (in ms) */
> +#define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000)
> +/* Timeout for Flash write operations (in ms) */
> +#define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000)
> +/* Timeout for Flash set sector lock bit operations (in ms) */
> +#define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000)
> +/* Timeout for Flash clear lock bit operations (in ms) */
> +#define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000)
> +
> +/*
> + * Use hardware flash sectors protection instead
> + * of U-Boot software protection
> + */
> +#undef CONFIG_SYS_FLASH_PROTECTION
> +#undef CONFIG_SYS_DIRECT_FLASH_TFTP
> +
> +/* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
> +#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
> +/* Monitor size */
> +#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
> +/* Size of DRAM reserved for malloc() use */
> +#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
> +/* size in bytes reserved for initial data */
> +#define CONFIG_SYS_GBL_DATA_SIZE (256)
> +#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
> +
> +/* ENV setting */
> +#define CONFIG_ENV_IS_IN_FLASH
> +#define CONFIG_ENV_OVERWRITE 1
> +#define CONFIG_ENV_SECT_SIZE (128 * 1024)
> +#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
> +#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
> +/* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
> +#define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
> +#define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE)
> +
> +/* Board Clock */
> +#define CONFIG_SYS_CLK_FREQ 41666666
> +#define CONFIG_SYS_TMU_CLK_DIV 4
> +#define CONFIG_SYS_HZ 1000
> +
> +#endif /* __ECOVEC_H */
> --
> 1.7.7
>
>
--
Nobuhiro Iwamatsu
iwamatsu at {nigauri.org / debian.org}
GPG ID: 40AD1FA6
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