[U-Boot] [PATCH v2] microblaze: usable uart16550 for big endian systems

[Stephan Linz]

As a result of the commit 6833260 the uart16550 driver
is broken for Microblaze big endian systems, because of
the missing 3 byte offset. Other than as described, not
all U-Boot BSP will treat properly the 3 byte offset.

This why prefer to mask out the 3 byte offset in general
and setup correct _REG_SIZE value depending on edianess.

Signed-off-by: Stephan Linz <linz at li-pro.net>
---
v2: Mask out 3 byte offset
    Set correct _REG_SIZE values for big/little endianess
---
 include/configs/microblaze-generic.h |    8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6b3fd76..03a6f5a 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -41,10 +41,14 @@
 #elif XILINX_UART16550_BASEADDR
 # define CONFIG_SYS_NS16550		1
 # define CONFIG_SYS_NS16550_SERIAL
-# define CONFIG_SYS_NS16550_REG_SIZE	-4
+# if defined(__MICROBLAZEEL__)
+#  define CONFIG_SYS_NS16550_REG_SIZE	-4
+# else
+#  define CONFIG_SYS_NS16550_REG_SIZE	4
+# endif
 # define CONFIG_CONS_INDEX		1
 # define CONFIG_SYS_NS16550_COM1 \
-			(XILINX_UART16550_BASEADDR + 0x1000)
+		((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
 # define CONFIG_SYS_NS16550_CLK	XILINX_UART16550_CLOCK_HZ
 # define CONFIG_BAUDRATE	115200
 
-- 
1.7.0.4