No subject


Thu Nov 17 21:02:02 CET 2011


The WAIT instruction forces the core into low power mode. The pipeline
is stalled and when all external requests are
completed, the processor=E2=80=99s main clock is stopped. The processor wil=
l
restart when reset (SI_Reset) is signaled, or a
non-masked interrupt is taken (SI_NMI, SI_Int, or EJ_DINT). Note that
the core does not use the code field in this
instruction.


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