[U-Boot] Attempts to make U-Boot start from L2 Cache on P2020RDB-like board

[Wojciech Zabolotny]

On Mon, Nov 28, 2011 at 11:59 PM, Ira W. Snyder <iws at ovro.caltech.edu> wrote:
> On Mon, Nov 28, 2011 at 11:22:01PM +0100, Wojciech Zabolotny wrote:
[...]
>> It seems that the U-Boot somehow misconfigures the SD controller.
>> The first part of U-Boot is loading correctly and the initial messages
>> are displayed,
>> but when it tries to continue downloading, it displays the "Data Read
>> Failed in PIO Mode."
>> and hangs.
>> I will appreciate any further pointers...
>
> I ran into this issue on the P2020COME board recently. I think the
> include/configs/P1_P2_RDB.h file isn't correct for P2020.
>
> Try removing the 3 lines:
> #ifdef CONFIG_P2020
> #define CONFIG_SYS_FSL_ESDHC_USE_PIO /* P2020 eSDHC DMA is not functional */
> #endif
>
> And add this line in their place:
> #define CONFIG_SYS_FSL_ESDHC_BROKEN_TIMEOUT
>
> Let me know if that helps. PIO mode was broken on my P2020, DMA mode
> worked.
>
> Ira

Thanks a lot!
It really works. Now I have working U-Boot and can debug my DDR.
-- 
Wojtek