[U-Boot] [PATCH 2/2] powerpc/85xx: Fix the work-arounds for errata SERDES-8 & SERDES-A001 on p4080

[Wolfgang Denk]

Dear Kumar Gala,

In message <1309492845-13117-2-git-send-email-galak at kernel.crashing.org> you wrote:
> From: Timur Tabi <timur at freescale.com>
> 
> Erratum SERDES-8 says that the clocks for bank 3 needs to be enabled if
> bank 2 is enabled, but this was not being done for SERDES protocols 0xF
> and 0x10.  The bank reset that was being done for erratum SERDES4 (a
> left-over work-around that was removed in "powerpc/85xx: remove SERDES4
> soft-reset work-around") also happened to enable bank 3 (apparently an
> undocumented feature).  Now that the reset has been removed, bank 3 was not
> being enabled for these two SERDES protocols.
> 
> It turns out that every time we call enable_bank(), we do want at least one
> lane of the bank enabled, either because the bank is supposed to be enabled,
> or because we need the clock from that bank enabled.
> 
> For erratum SERDES-A001, we don't want to modify srds_lpd_b[] when we
> call enable_bank(), because that array is used elsewhere to determine if
> the bank is available.
> 
> Also fix an off-by-one error in a printf().
> 
> Note that the side effect of these changes is that the work-arounds for these
> two errata are now linked.  Specifically, if SERDES-A001 is enabled, then we
> need SERDES-8 enabled as well.
> 
> Signed-off-by: Timur Tabi <timur at freescale.com>
> Acked-by: Ed Swarthout <swarthou at freescale.com>
> Acked-by: Scott Wood <scottwood at freescale.com>
> Signed-off-by: Kumar Gala <galak at kernel.crashing.org>
> ---
>  arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c |   68 ++++++++++++++++++-------
>  1 files changed, 49 insertions(+), 19 deletions(-)


Checkpatch says:

WARNING: line over 80 characters
#127: FILE: arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c:43:
+#error "CONFIG_SYS_P4080_ERRATUM_SERDES_A001 requires CONFIG_SYS_P4080_ERRATUM_SERDES8"


Please clean up and resubmit.  Thanks.

Best regards,

Wolfgang Denk

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