[U-Boot] [PATCH] mii: miiphy register address width change

Mike Frysinger vapier at gentoo.org
Fri Oct 21 00:42:18 CEST 2011


On Thursday 20 October 2011 17:45:33 Andy Fleming wrote:
> On Thu, Oct 20, 2011 at 8:58 AM, Mike Frysinger <vapier at gentoo.org> wrote:
> > On Thursday 20 October 2011 09:55:34 Kumar Gala wrote:
> >> On Oct 20, 2011, at 8:26 AM, Mike Frysinger wrote:
> >> > On Thursday 20 October 2011 06:34:33 Kumar Nath, Chandan wrote:
> >> >> This patch was acked on September 21, but in latest code base I could
> >> >> not find this patch. Is there anything left which I need to take care
> >> >> in my patch. If so, please let me know so that this can be picked up.
> >> > 
> >> > i don't merge net patches.  wolfgang does.  i don't think there's
> >> > anything left for you to do.
> >> 
> >> I think this breaks 10g support.  I'm pretty sure Andy made the data
> >> type a short for a reason.
> > 
> > the data type in mainline is 8bits (char).  Chandan is fixing it to be
> > 16bits (short).  if 10g breaks with a short, that sounds like a bug in
> > the 10g code we should figure out + fix.  Linux is using a short just
> > fine afaict.
> 
> Actually, there's some confusion, here. The function being updated by
> this patch isn't part of phylib. It's part of the legacy miiphy code.
> I don't think there's any reason to update it. If you are writing a
> new driver with 10G support (which would, admittedly, require a 16-bit
> register argument), then don't use miiphy_register. Call
> mdio_register, and register proper phylib support. The mii command
> isn't capable of dealing with Clause-45 MDIO transactions, anyway (no
> devad)

so the patch is correct, but we don't want to merge it because we don't want 
to encourage the old miiphy interface ?  and leaving it broken forces people 
to migrate to the new phy layer ?
-mike
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