[U-Boot] [PATCH] mii: miiphy register address width change

[Kumar Nath, Chandan]

> -----Original Message-----
> From: u-boot-bounces at lists.denx.de [mailto:u-boot-
> bounces at lists.denx.de] On Behalf Of Andy Fleming
> Sent: Friday, October 21, 2011 4:24 AM
> To: Mike Frysinger
> Cc: u-boot at lists.denx.de List; Andy Fleming; Kumar Gala
> Subject: Re: [U-Boot] [PATCH] mii: miiphy register address width change
> 
> On Thu, Oct 20, 2011 at 5:42 PM, Mike Frysinger <vapier at gentoo.org>
> wrote:
> > On Thursday 20 October 2011 17:45:33 Andy Fleming wrote:
> >> On Thu, Oct 20, 2011 at 8:58 AM, Mike Frysinger <vapier at gentoo.org>
> wrote:
> >> > On Thursday 20 October 2011 09:55:34 Kumar Gala wrote:
> >> >> On Oct 20, 2011, at 8:26 AM, Mike Frysinger wrote:
> >> >> > On Thursday 20 October 2011 06:34:33 Kumar Nath, Chandan wrote:
> >> >> >> This patch was acked on September 21, but in latest code base
> I could
> >> >> >> not find this patch. Is there anything left which I need to
> take care
> >> >> >> in my patch. If so, please let me know so that this can be
> picked up.
> >> >> >
> >> >> > i don't merge net patches.  wolfgang does.  i don't think
> there's
> >> >> > anything left for you to do.
> >> >>
> >> >> I think this breaks 10g support.  I'm pretty sure Andy made the
> data
> >> >> type a short for a reason.
> >> >
> >> > the data type in mainline is 8bits (char).  Chandan is fixing it
> to be
> >> > 16bits (short).  if 10g breaks with a short, that sounds like a
> bug in
> >> > the 10g code we should figure out + fix.  Linux is using a short
> just
> >> > fine afaict.
> >>
> >> Actually, there's some confusion, here. The function being updated
> by
> >> this patch isn't part of phylib. It's part of the legacy miiphy
> code.
> >> I don't think there's any reason to update it. If you are writing a
> >> new driver with 10G support (which would, admittedly, require a 16-
> bit
> >> register argument), then don't use miiphy_register. Call
> >> mdio_register, and register proper phylib support. The mii command
> >> isn't capable of dealing with Clause-45 MDIO transactions, anyway
> (no
> >> devad)
> >
> > so the patch is correct, but we don't want to merge it because we
> don't want
> > to encourage the old miiphy interface ?  and leaving it broken forces
> people
> > to migrate to the new phy layer ?
> 
> I don't think the patch is correct or incorrect. It attempts to update
> the miiphy_* API to support larger register offsets. I'm suggesting
> that we shouldn't change the legacy API to support new features.
> There's no way to specify via miiphy_write that you want to write to a
> register with a 16-bit register offset, because there's no way to
> specify which device to write.
> 
> So I'm not saying we shouldn't apply this patch. I'm questioning why
> it was written in a hope that we can discourage new use of the old
> API. I'm also not convinced the patch helps anything.
> 
> Andy

This patch was written to support PHY register whose address width is greater
than 8 bit. It was not written for 10 gig support.

- Chandan

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