[U-Boot] [PATCH V3] Ethernut 5 board support
Igor Grinberg
grinberg at compulab.co.il
Mon Oct 24 15:15:38 CEST 2011
On 10/24/2011 12:33 PM, Tim Schendekehl wrote:
> Add support for the Ethernut 5 open hardware design, based
> on Atmel's AT91SAM9XE512 SoC.
>
> V3
> - Fix issues with latest git.
>
> Signed-off-by: Tim Schendekehl <tim.schendekehl at egnite.de>
> ---
[...]
> diff --git a/board/egnite/ethernut5/Makefile b/board/egnite/ethernut5/Makefile
> new file mode 100644
> index 0000000..d8e485f
> --- /dev/null
> +++ b/board/egnite/ethernut5/Makefile
[...]
> +
> +clean:
> + rm -f $(SOBJS) $(OBJS)
> +
> +distclean: clean
> + rm -f $(LIB) core *.bak $(obj).depend
You shouldn't be adding this.
Please, see the commit 464c79207c89f247f97b344495924eabb0c9738e
(punt unused clean/distclean targets) by Mike.
[...]
> diff --git a/board/egnite/ethernut5/ethernut5.c b/board/egnite/ethernut5/ethernut5.c
> new file mode 100644
> index 0000000..50c4cb3
> --- /dev/null
> +++ b/board/egnite/ethernut5/ethernut5.c
[...]
> +#ifdef CONFIG_CMD_NAND
> +static void ethernut5_nand_hw_init(void)
> +{
> + struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
> + struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
> + unsigned long csa;
> +
> + /* Assign CS3 to NAND/SmartMedia Interface */
> + csa = readl(&matrix->ebicsa);
> + csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
> + writel(csa, &matrix->ebicsa);
> +
> + /* Configure SMC CS3 for NAND/SmartMedia */
> + writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) |
> + AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0),
> + &smc->cs[3].setup);
> + writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) |
> + AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3),
> + &smc->cs[3].pulse);
> + writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5),
> + &smc->cs[3].cycle);
> + writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
> + AT91_SMC_MODE_EXNW_DISABLE |
> + AT91_SMC_MODE_DBW_8 |
> + AT91_SMC_MODE_TDF_CYCLE(2),
> + &smc->cs[3].mode);
> +
> +#ifdef CONFIG_SYS_NAND_READY_PIN
> + /* Ready pin is optional. */
> + at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
> +#endif
> + at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
> +
> +
Please, remove these 2 empty lines.
> +}
> +#endif
> +
> +/*
> + * This is called first during late initialization.
> + */
> +int board_init(void)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> + /* Enable clocks for all PIOs */
> + writel((1 << ATMEL_ID_PIOA) | (1 << ATMEL_ID_PIOB) |
> + (1 << ATMEL_ID_PIOC),
> + &pmc->pcer);
> +
> + /* Enable ctrl+c. */
> + console_init_f();
This one has already been called in the init_sequence array.
Why do you need to call it the second time?
> + /* Set our official architecture number. */
> + gd->bd->bi_arch_number = 1971; /*MACH_TYPE_ETHERNUT5*/
This should be done in the board config file.
Please, read the README file (CONFIG_MACH_TYPE option).
> + /* Set adress of boot parameters. */
> + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> + /* Initialize UARTs and power management. */
> + at91_seriald_hw_init();
> + ethernut5_power_init();
> +
> + ethernut5_nand_hw_init();
> +
> +#ifdef CONFIG_HAS_DATAFLASH
> + at91_spi0_hw_init(1 << 0);
> +#endif
> + return 0;
> +}
[...]
> +#ifdef CONFIG_GENERIC_ATMEL_MCI
> +int board_mmc_init(bd_t *bd)
> +{
> + struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
> +
> + /* Enable MCI clock. */
> + writel(1 << ATMEL_ID_MCI,
> + &pmc->pcer);
Why not leave this on the same line?
> +
> + /* Initialize MCI hardware. */
> + at91_mci_hw_init();
> + /* Register the device. */
> + return atmel_mci_init((void *)ATMEL_BASE_MCI);
> +}
[...]
Regards,
Igor.
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