[U-Boot] [PATCH v3 3/6] mmc: dcache: allocate cache aligned buffer for scr and switch_status

[Wolfgang Denk]

Dear Anton Staaf,

In message <1318463764-28244-4-git-send-email-robotboy at chromium.org> you wrote:
> Currently the sd_change_freq function allocates two buffers on the
> stack that it passes down to the MMC device driver.  These buffers
> could be unaligned to the L1 dcache line size.  This causes problems
> when using DMA and with caches enabled.
> 
> This patch correctly cache alignes the buffers used for reading the
> scr register and switch status values from an MMC device.
> 
> Signed-off-by: Anton Staaf <robotboy at chromium.org>
> Acked-by: Mike Frysinger <vapier at gentoo.org>
> Cc: Lukasz Majewski <l.majewski at samsung.com>
> Cc: Mike Frysinger <vapier at gentoo.org>
> Cc: Albert ARIBAUD <albert.u.boot at aribaud.net>
> ---
>  drivers/mmc/mmc.c |   10 +++++-----
>  1 files changed, 5 insertions(+), 5 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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