[U-Boot] [PATCH v2] QorIQ: fix network frame manager TBI PHY address settings

[Roy Zang]

TBI PHY address (TBIPA) register has been set in general frame manager
phy init funciton dtsec_init_phy() in drivers/net/fm/eth.c

So remove the duplicate code on QorIQ frame manager Ethernet related
platforms, which include Hydra board, P4080DS board and P2041rdb board.

Signed-off-by: Roy Zang <tie-fei.zang at freescale.com>
Cc: Andy Fleming <afleming at freescale.com>
Cc: Kumar Gala <galak at kernel.crashing.org>
---
v2: refine the subject and description according to feedback

 board/freescale/corenet_ds/eth_hydra.c |    8 --------
 board/freescale/corenet_ds/eth_p4080.c |    8 --------
 board/freescale/p2041rdb/eth.c         |    8 --------
 3 files changed, 0 insertions(+), 24 deletions(-)

diff --git a/board/freescale/corenet_ds/eth_hydra.c b/board/freescale/corenet_ds/eth_hydra.c
index 91b3408..639358d 100644
--- a/board/freescale/corenet_ds/eth_hydra.c
+++ b/board/freescale/corenet_ds/eth_hydra.c
@@ -395,7 +395,6 @@ void fdt_fixup_board_enet(void *fdt)
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FMAN_ENET
-	struct dtsec *tsec = (void *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
 	struct fsl_pq_mdio_info dtsec_mdio_info;
 	struct tgec_mdio_info tgec_mdio_info;
 	unsigned int i, slot;
@@ -405,13 +404,6 @@ int board_eth_init(bd_t *bis)
 
 	initialize_lane_to_slot();
 
-	/*
-	 * Set TBIPA on FM1 at DTSEC1.  This is needed for configurations
-	 * where FM1 at DTSEC1 isn't used directly, since it provides
-	 * MDIO for other ports.
-	 */
-	out_be32(&tsec->tbipa, CONFIG_SYS_TBIPA_VALUE);
-
 	/* We want to use the PIXIS to configure MUX routing, not GPIOs. */
 	setbits_8(&pixis->brdcfg2, BRDCFG2_REG_GPIO_SEL);
 
diff --git a/board/freescale/corenet_ds/eth_p4080.c b/board/freescale/corenet_ds/eth_p4080.c
index d4657f7..208b97a 100644
--- a/board/freescale/corenet_ds/eth_p4080.c
+++ b/board/freescale/corenet_ds/eth_p4080.c
@@ -295,7 +295,6 @@ int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FMAN_ENET
 	ccsr_gpio_t *pgpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR);
-	struct dtsec *tsec = (void *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
 	int i;
 	struct fsl_pq_mdio_info dtsec_mdio_info;
 	struct tgec_mdio_info tgec_mdio_info;
@@ -321,13 +320,6 @@ int board_eth_init(bd_t *bis)
 		SLOT5, /* 17 - Bank 3:D */
 	};
 
-	/*
-	 * Set TBIPA on FM1 at DTSEC1.  This is needed for configurations
-	 * where FM1 at DTSEC1 isn't used directly, since it provides
-	 * MDIO for other ports.
-	 */
-	out_be32(&tsec->tbipa, CONFIG_SYS_TBIPA_VALUE);
-
 	/* Initialize the mdio_mux array so we can recognize empty elements */
 	for (i = 0; i < NUM_FM_PORTS; i++)
 		mdio_mux[i] = EMI_NONE;
diff --git a/board/freescale/p2041rdb/eth.c b/board/freescale/p2041rdb/eth.c
index 0a1dfa7..4b0d577 100644
--- a/board/freescale/p2041rdb/eth.c
+++ b/board/freescale/p2041rdb/eth.c
@@ -139,7 +139,6 @@ void board_ft_fman_fixup_port(void *fdt, char *compat, phys_addr_t addr,
 int board_eth_init(bd_t *bis)
 {
 #ifdef CONFIG_FMAN_ENET
-	struct dtsec *tsec = (void *)CONFIG_SYS_FSL_FM1_DTSEC1_ADDR;
 	struct fsl_pq_mdio_info dtsec_mdio_info;
 	struct tgec_mdio_info tgec_mdio_info;
 	unsigned int i, slot;
@@ -149,13 +148,6 @@ int board_eth_init(bd_t *bis)
 
 	initialize_lane_to_slot();
 
-	/*
-	 * Set TBIPA on FM1 at DTSEC1.  This is needed for configurations
-	 * where FM1 at DTSEC1 isn't used directly, since it provides
-	 * MDIO for other ports.
-	 */
-	out_be32(&tsec->tbipa, CONFIG_SYS_TBIPA_VALUE);
-
 	dtsec_mdio_info.regs =
 		(struct tsec_mii_mng *)CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR;
 	dtsec_mdio_info.name = DEFAULT_FM_MDIO_NAME;
-- 
1.6.0.6