[U-Boot] [PATCH 3/4] exynos5: Add DT based driver for SMSC92xx ethernet
Simon Glass
sjg at chromium.org
Tue Nov 6 02:42:23 CET 2012
Hi Hatim,
On Mon, Nov 5, 2012 at 2:18 AM, Hatim Ali <hatim.rv at samsung.com> wrote:
> Add device tree based ethernet driver for SMSC92xx controller on
> SMDK5250 boards.
>
> Signed-off-by: Hatim Ali <hatim.rv at samsung.com>
Acked-by: Simon Glass <sjg at chromium.org>
but see comment below
>
> diff --git a/arch/arm/include/asm/arch-exynos/sromc.h b/arch/arm/include/asm/arch-exynos/sromc.h
> index f616bcb..dc6aae2 100644
> --- a/arch/arm/include/asm/arch-exynos/sromc.h
> +++ b/arch/arm/include/asm/arch-exynos/sromc.h
> @@ -48,4 +48,22 @@ struct s5p_sromc {
> /* Configure the Band Width and Bank Control Regs for required SROMC Bank */
> void s5p_config_sromc(u32 srom_bank, u32 srom_bw_conf, u32 srom_bc_conf);
>
> +enum {
> + FDT_SROM_PMC,
> + FDT_SROM_TACP,
> + FDT_SROM_TAH,
> + FDT_SROM_TCOH,
> + FDT_SROM_TACC,
> + FDT_SROM_TCOS,
> + FDT_SROM_TACS,
> +
> + FDT_SROM_TIMING_COUNT,
> +};
> +
> +struct fdt_sromc {
> + u8 bank; /* srom bank number */
> + u8 width; /* bus width in bytes */
> + unsigned int timing[FDT_SROM_TIMING_COUNT]; /* timing parameters */
> +};
> +
> #endif /* __ASM_ARCH_SROMC_H_ */
> diff --git a/board/samsung/smdk5250/smdk5250.c b/board/samsung/smdk5250/smdk5250.c
> index 4c50342..ac7346d 100644
> --- a/board/samsung/smdk5250/smdk5250.c
> +++ b/board/samsung/smdk5250/smdk5250.c
> @@ -21,6 +21,7 @@
> */
>
> #include <common.h>
> +#include <fdtdec.h>
> #include <asm/io.h>
> #include <i2c.h>
> #include <netdev.h>
> @@ -34,34 +35,6 @@
>
> DECLARE_GLOBAL_DATA_PTR;
>
> -#ifdef CONFIG_SMC911X
> -static int smc9115_pre_init(void)
> -{
> - u32 smc_bw_conf, smc_bc_conf;
> - int err;
> -
> - /* Ethernet needs data bus width of 16 bits */
> - smc_bw_conf = SROMC_DATA16_WIDTH(CONFIG_ENV_SROM_BANK)
> - | SROMC_BYTE_ENABLE(CONFIG_ENV_SROM_BANK);
> -
> - smc_bc_conf = SROMC_BC_TACS(0x01) | SROMC_BC_TCOS(0x01)
> - | SROMC_BC_TACC(0x06) | SROMC_BC_TCOH(0x01)
> - | SROMC_BC_TAH(0x0C) | SROMC_BC_TACP(0x09)
> - | SROMC_BC_PMC(0x01);
> -
> - /* Select and configure the SROMC bank */
> - err = exynos_pinmux_config(PERIPH_ID_SROMC,
> - CONFIG_ENV_SROM_BANK | PINMUX_FLAG_16BIT);
> - if (err) {
> - debug("SROMC not configured\n");
> - return err;
> - }
> -
> - s5p_config_sromc(CONFIG_ENV_SROM_BANK, smc_bw_conf, smc_bc_conf);
> - return 0;
> -}
> -#endif
> -
> int board_init(void)
> {
> gd->bd->bi_boot_params = (PHYS_SDRAM_1 + 0x100UL);
> @@ -115,12 +88,94 @@ void dram_init_banksize(void)
> PHYS_SDRAM_8_SIZE);
> }
>
> +#ifdef CONFIG_OF_CONTROL
> +static int decode_sromc(const void *blob, struct fdt_sromc *config)
> +{
> + int err;
> + int node;
> +
> + node = fdtdec_next_compatible(blob, 0, COMPAT_SAMSUNG_EXYNOS5_SROMC);
> + if (node < 0) {
> + debug("Could not find SROMC node\n");
> + return node;
> + }
> +
> + config->bank = fdtdec_get_int(blob, node, "bank", 0);
> + config->width = fdtdec_get_int(blob, node, "width", 2);
here you support 16-bit
> +
> + err = fdtdec_get_int_array(blob, node, "srom-timing", config->timing,
> + FDT_SROM_TIMING_COUNT);
> + if (err < 0) {
> + debug("Could not decode SROMC configuration\n");
> + return -FDT_ERR_NOTFOUND;
> + }
> +
> + return 0;
> +}
> +#endif
> +
> int board_eth_init(bd_t *bis)
> {
> #ifdef CONFIG_SMC911X
> - if (smc9115_pre_init())
> + u32 smc_bw_conf, smc_bc_conf;
> + struct fdt_sromc config;
> + fdt_addr_t base_addr;
> + int node;
> +
> +#ifdef CONFIG_OF_CONTROL
> + node = decode_sromc(gd->fdt_blob, &config);
> + if (node < 0) {
> + debug("%s: Could not find sromc configuration\n", __func__);
> + return 0;
> + }
> + node = fdtdec_next_compatible(gd->fdt_blob, node, COMPAT_SMSC_LAN9215);
> + if (node < 0) {
> + debug("%s: Could not find lan9215 configuration\n", __func__);
> + return 0;
> + }
> +
> + /* We now have a node, so any problems from now on are errors */
> + base_addr = fdtdec_get_addr(gd->fdt_blob, node, "reg");
> + if (base_addr == FDT_ADDR_T_NONE) {
> + debug("%s: Could not find lan9215 address\n", __func__);
> return -1;
> - return smc911x_initialize(0, CONFIG_SMC911X_BASE);
> + }
> +#else
> + /* Non-FDT configuration - bank number and timing parameters*/
> + config.bank = CONFIG_ENV_SROM_BANK;
> + config.width = 2;
> +
> + config.timing[FDT_SROM_TACS] = 0x01;
> + config.timing[FDT_SROM_TCOS] = 0x01;
> + config.timing[FDT_SROM_TACC] = 0x06;
> + config.timing[FDT_SROM_TCOH] = 0x01;
> + config.timing[FDT_SROM_TAH] = 0x0C;
> + config.timing[FDT_SROM_TACP] = 0x09;
> + config.timing[FDT_SROM_PMC] = 0x01;
> + base_addr = CONFIG_SMC911X_BASE;
> +#endif
> +
> + /* Ethernet needs data bus width of 16 bits */
> + if (config.width != 2) {
> + debug("%s: Unsupported bus width %d\n", __func__,
> + config.width);
> + return -1;
> + }
> + smc_bw_conf = SROMC_DATA16_WIDTH(config.bank)
> + | SROMC_BYTE_ENABLE(config.bank);
> +
> + smc_bc_conf = SROMC_BC_TACS(config.timing[FDT_SROM_TACS]) |\
> + SROMC_BC_TCOS(config.timing[FDT_SROM_TCOS]) |\
> + SROMC_BC_TACC(config.timing[FDT_SROM_TACC]) |\
> + SROMC_BC_TCOH(config.timing[FDT_SROM_TCOH]) |\
> + SROMC_BC_TAH(config.timing[FDT_SROM_TAH]) |\
> + SROMC_BC_TACP(config.timing[FDT_SROM_TACP]) |\
> + SROMC_BC_PMC(config.timing[FDT_SROM_PMC]);
> +
> + /* Select and configure the SROMC bank */
> + exynos_pinmux_config(PERIPH_ID_SROMC, config.bank);
But from what I can see, the above function does not support setting
up a 16-bit SROMC. Perhaps the subject of a future patch?
> + s5p_config_sromc(config.bank, smc_bw_conf, smc_bc_conf);
> + return smc911x_initialize(0, base_addr);
> #endif
> return 0;
> }
> --
> 1.7.2.3
>
Regards,
Simon
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