[U-Boot] [PATCH v2 3/8] am33xx: NAND support
Peter Korsgaard
jacmet at sunsite.dk
Thu Nov 8 10:33:57 CET 2012
>>>>> "Ilya" == Ilya Yanok <ilya.yanok at cogentembedded.com> writes:
Ilya> TI AM33XX has the same GPMC controller as OMAP3 so we could just use the
Ilya> existing omap_gpmc driver. This patch adds adds required
Ilya> definitions/intialization.
Ilya> Signed-off-by: Ilya Yanok <ilya.yanok at cogentembedded.com>
..
Ilya> +void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base,
Ilya> + u32 size)
Ilya> +{
Ilya> + writel(0, &cs->config7);
Ilya> + sdelay(1000);
Ilya> + /* Delay for settling */
That comment should go above the delay.
Ilya> + writel(gpmc_config[0], &cs->config1);
Ilya> + writel(gpmc_config[1], &cs->config2);
Ilya> + writel(gpmc_config[2], &cs->config3);
Ilya> + writel(gpmc_config[3], &cs->config4);
Ilya> + writel(gpmc_config[4], &cs->config5);
Ilya> + writel(gpmc_config[5], &cs->config6);
Ilya> + /* Enable the config */
Ilya> + writel((((size & 0xF) << 8) | ((base >> 24) & 0x3F) |
Ilya> + (1 << 6)), &cs->config7);
Ilya> + sdelay(2000);
Any reason you now wait double as long?
Ilya> +}
Ilya> +
Ilya> +/*****************************************************
Ilya> + * gpmc_init(): init gpmc bus
Ilya> + * Init GPMC for x16, MuxMode (SDRAM in x32).
Ilya> + * This code can only be executed from SRAM or SDRAM.
Ilya> + *****************************************************/
Ilya> +void gpmc_init(void)
Ilya> +{
Ilya> + /* putting a blanket check on GPMC based on ZeBu for now */
Ilya> + gpmc_cfg = (struct gpmc *)GPMC_BASE;
Ilya> +
Ilya> +#ifdef CONFIG_CMD_NAND
Ilya> + const u32 *gpmc_config = NULL;
Ilya> + u32 base = 0;
Ilya> + u32 size = 0;
Ilya> +#endif
Ilya> + /* global settings */
Ilya> + writel(0x00000008, &gpmc_cfg->sysconfig);
Ilya> + writel(0x00000100, &gpmc_cfg->irqstatus);
Ilya> + writel(0x00000200, &gpmc_cfg->irqenable);
Ilya> + writel(0x00000012, &gpmc_cfg->config);
Ilya> + /*
Ilya> + * Disable the GPMC0 config set by ROM code
Ilya> + */
Ilya> + writel(0, &gpmc_cfg->cs[0].config7);
Ilya> + sdelay(1000);
Why? You already do this in enable_gpmc_cs_config().
Ilya> +
Ilya> +#ifdef CONFIG_CMD_NAND
Ilya> + gpmc_config = gpmc_m_nand;
Ilya> +
Ilya> + base = PISMO1_NAND_BASE;
Ilya> + size = PISMO1_NAND_SIZE;
Ilya> + enable_gpmc_cs_config(gpmc_config, &gpmc_cfg->cs[0], base, size);
Ilya> +#endif
Ilya> +}
Ilya> +++ b/arch/arm/include/asm/arch-am33xx/mem.h
Ilya> @@ -0,0 +1,83 @@
Ilya> +/*
Ilya> + * (C) Copyright 2006-2008
Ilya> + * Texas Instruments, <www.ti.com>
Ilya> + *
Ilya> + * Author
Ilya> + * Mansoor Ahamed <mansoor.ahamed at ti.com>
Ilya> + *
Ilya> + * Initial Code from:
Ilya> + * Richard Woodruff <r-woodruff2 at ti.com>
Ilya> + *
Ilya> + * See file CREDITS for list of people who contributed to this
Ilya> + * project.
Ilya> + *
Ilya> + * This program is free software; you can redistribute it and/or
Ilya> + * modify it under the terms of the GNU General Public License as
Ilya> + * published by the Free Software Foundation; either version 2 of
Ilya> + * the License, or (at your option) any later version.
Ilya> + *
Ilya> + * This program is distributed in the hope that it will be useful,
Ilya> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
Ilya> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Ilya> + * GNU General Public License for more details.
Ilya> + *
Ilya> + * You should have received a copy of the GNU General Public License
Ilya> + * along with this program; if not, write to the Free Software
Ilya> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
Ilya> + * MA 02111-1307 USA
Ilya> + */
Ilya> +
Ilya> +#ifndef _MEM_H_
Ilya> +#define _MEM_H_
Ilya> +
Ilya> +/*
Ilya> + * GPMC settings -
Ilya> + * Definitions is as per the following format
Ilya> + * #define <PART>_GPMC_CONFIG<x> <value>
Ilya> + * Where:
Ilya> + * PART is the part name e.g. STNOR - Intel Strata Flash
Ilya> + * x is GPMC config registers from 1 to 6 (there will be 6 macros)
Ilya> + * Value is corresponding value
Ilya> + *
Ilya> + * For every valid PRCM configuration there should be only one definition of
Ilya> + * the same. if values are independent of the board, this definition will be
Ilya> + * present in this file if values are dependent on the board, then this should
Ilya> + * go into corresponding mem-boardName.h file
Ilya> + *
Ilya> + * Currently valid part Names are (PART):
Ilya> + * M_NAND - Micron NAND
Ilya> + */
Ilya> +#define GPMC_SIZE_256M 0x0
Ilya> +#define GPMC_SIZE_128M 0x8
Ilya> +#define GPMC_SIZE_64M 0xC
Ilya> +#define GPMC_SIZE_32M 0xE
Ilya> +#define GPMC_SIZE_16M 0xF
Ilya> +
Ilya> +#define M_NAND_GPMC_CONFIG1 0x00000800
Ilya> +#define M_NAND_GPMC_CONFIG2 0x001e1e00
Ilya> +#define M_NAND_GPMC_CONFIG3 0x001e1e00
Ilya> +#define M_NAND_GPMC_CONFIG4 0x16051807
Ilya> +#define M_NAND_GPMC_CONFIG5 0x00151e1e
Ilya> +#define M_NAND_GPMC_CONFIG6 0x16000f80
Ilya> +#define M_NAND_GPMC_CONFIG7 0x00000008
For what Micron part is this exactly? How about using the actual part
number in the define like we recently did for the DDR configuration?
Ilya> +++ b/arch/arm/include/asm/arch-am33xx/omap_gpmc.h
Ilya> @@ -0,0 +1,120 @@
Ilya> +/*
Ilya> + * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
Ilya> + * Rohit Choraria <rohitkc at ti.com>
Ilya> + *
Ilya> + * See file CREDITS for list of people who contributed to this
Ilya> + * project.
Ilya> + *
Ilya> + * This program is free software; you can redistribute it and/or
Ilya> + * modify it under the terms of the GNU General Public License as
Ilya> + * published by the Free Software Foundation; either version 2 of
Ilya> + * the License, or (at your option) any later version.
Ilya> + *
Ilya> + * This program is distributed in the hope that it will be useful,
Ilya> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
Ilya> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
Ilya> + * GNU General Public License for more details.
Ilya> + *
Ilya> + * You should have received a copy of the GNU General Public License
Ilya> + * along with this program; if not, write to the Free Software
Ilya> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
Ilya> + * MA 02111-1307 USA
Ilya> + */
Ilya> +#ifndef __ASM_ARCH_OMAP_GPMC_H
Ilya> +#define __ASM_ARCH_OMAP_GPMC_H
Ilya> +
Ilya> +#define GPMC_BUF_EMPTY 0
Ilya> +#define GPMC_BUF_FULL 1
Ilya> +
Ilya> +#define ECCCLEAR (0x1 << 8)
Ilya> +#define ECCRESULTREG1 (0x1 << 0)
Ilya> +#define ECCSIZE512BYTE 0xFF
Ilya> +#define ECCSIZE1 (ECCSIZE512BYTE << 22)
Ilya> +#define ECCSIZE0 (ECCSIZE512BYTE << 12)
Ilya> +#define ECCSIZE0SEL (0x000 << 0)
Ilya> +
Ilya> +/* Generic ECC Layouts */
Ilya> +/* Large Page x8 NAND device Layout */
Ilya> +#ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
Ilya> +#define GPMC_NAND_HW_ECC_LAYOUT {\
Ilya> + .eccbytes = 12,\
Ilya> + .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
Ilya> + 9, 10, 11, 12},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 13,\
Ilya> + .length = 51 } } \
Ilya> +}
Ilya> +#endif
Ilya> +
Ilya> +/* Large Page x16 NAND device Layout */
Ilya> +#ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
Ilya> +#define GPMC_NAND_HW_ECC_LAYOUT {\
Ilya> + .eccbytes = 12,\
Ilya> + .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
Ilya> + 10, 11, 12, 13},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 14,\
Ilya> + .length = 50 } } \
Ilya> +}
Ilya> +#endif
Ilya> +
Ilya> +/* Small Page x8 NAND device Layout */
Ilya> +#ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
Ilya> +#define GPMC_NAND_HW_ECC_LAYOUT {\
Ilya> + .eccbytes = 3,\
Ilya> + .eccpos = {1, 2, 3},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 4,\
Ilya> + .length = 12 } } \
Ilya> +}
Ilya> +#endif
Ilya> +
Ilya> +/* Small Page x16 NAND device Layout */
Ilya> +#ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
Ilya> +#define GPMC_NAND_HW_ECC_LAYOUT {\
Ilya> + .eccbytes = 3,\
Ilya> + .eccpos = {2, 3, 4},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 5,\
Ilya> + .length = 11 } } \
Ilya> +}
Ilya> +#endif
Ilya> +
Ilya> +#define GPMC_NAND_HW_BCH4_ECC_LAYOUT {\
Ilya> + .eccbytes = 32,\
Ilya> + .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
Ilya> + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
Ilya> + 28, 29, 30, 31, 32, 33},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 34,\
Ilya> + .length = 30 } } \
Ilya> +}
Ilya> +
Ilya> +#define GPMC_NAND_HW_BCH8_ECC_LAYOUT {\
Ilya> + .eccbytes = 56,\
Ilya> + .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
Ilya> + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
Ilya> + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
Ilya> + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
Ilya> + 52, 53, 54, 55, 56, 57},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 58,\
Ilya> + .length = 6 } } \
Ilya> +}
Ilya> +
Ilya> +#define GPMC_NAND_HW_BCH16_ECC_LAYOUT {\
Ilya> + .eccbytes = 104,\
Ilya> + .eccpos = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,\
Ilya> + 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27,\
Ilya> + 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39,\
Ilya> + 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51,\
Ilya> + 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63,\
Ilya> + 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75,\
Ilya> + 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87,\
Ilya> + 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99,\
Ilya> + 100, 101, 102, 103, 104, 105},\
Ilya> + .oobfree = {\
Ilya> + {.offset = 106,\
Ilya> + .length = 8 } } \
Ilya> +}
Ilya> +#endif /* __ASM_ARCH_OMAP_GPMC_H */
Do the non-BCH layouts make sense for am33xx? I've noticed that the TRM
shows the BCH8 format as 13 bytes/256 tightly packed instead of 14, but
that's wrong. I'll report it to the doc people.
--
Bye, Peter Korsgaard
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