[U-Boot] [PATCH 20/57] ppc: Move CONFIG_QE to arch_global_data

[Simon Glass]

Move the quantative easing fields into arch_global_data and tidy up.

Signed-off-by: Simon Glass <sjg at chromium.org>
---
 arch/powerpc/cpu/mpc83xx/speed.c       |    5 +++--
 arch/powerpc/cpu/mpc85xx/speed.c       |    4 ++--
 arch/powerpc/include/asm/global_data.h |   14 ++++++--------
 drivers/qe/fdt.c                       |    8 ++++----
 drivers/qe/qe.c                        |   19 ++++++++++---------
 5 files changed, 25 insertions(+), 25 deletions(-)

diff --git a/arch/powerpc/cpu/mpc83xx/speed.c b/arch/powerpc/cpu/mpc83xx/speed.c
index a40a055..ba8b285 100644
--- a/arch/powerpc/cpu/mpc83xx/speed.c
+++ b/arch/powerpc/cpu/mpc83xx/speed.c
@@ -495,7 +495,7 @@ int get_clocks(void)
 	gd->arch.mem_sec_clk = mem_sec_clk;
 #endif
 #if defined(CONFIG_QE)
-	gd->qe_clk = qe_clk;
+	gd->arch.qe_clk = qe_clk;
 	gd->arch.brg_clk = brg_clk;
 #endif
 #if defined(CONFIG_MPC8308) || defined(CONFIG_MPC831x) || \
@@ -541,7 +541,8 @@ static int do_clocks(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 	printf("  Coherent System Bus: %-4s MHz\n",
 	       strmhz(buf, gd->arch.csb_clk));
 #if defined(CONFIG_QE)
-	printf("  QE:                  %-4s MHz\n", strmhz(buf, gd->qe_clk));
+	printf("  QE:                  %-4s MHz\n",
+	       strmhz(buf, gd->arch.qe_clk));
 	printf("  BRG:                 %-4s MHz\n",
 	       strmhz(buf, gd->arch.brg_clk));
 #endif
diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index 81c80e7..7173c07 100644
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -394,8 +394,8 @@ int get_clocks (void)
 	gd->arch.lbc_clk = sys_info.freqLocalBus;
 
 #ifdef CONFIG_QE
-	gd->qe_clk = sys_info.freqQE;
-	gd->arch.brg_clk = gd->qe_clk / 2;
+	gd->arch.qe_clk = sys_info.freqQE;
+	gd->arch.brg_clk = gd->arch.qe_clk / 2;
 #endif
 	/*
 	 * The base clock for I2C depends on the actual SOC.  Unfortunately,
diff --git a/arch/powerpc/include/asm/global_data.h b/arch/powerpc/include/asm/global_data.h
index b710f25..760cdab 100644
--- a/arch/powerpc/include/asm/global_data.h
+++ b/arch/powerpc/include/asm/global_data.h
@@ -39,9 +39,6 @@ struct arch_global_data {
 	unsigned long scc_clk;
 	unsigned long brg_clk;
 #endif
-#if defined(CONFIG_QE)
-	u32 brg_clk;
-#endif
 	/* TODO: sjg at chromium.org: Should these be unslgned long? */
 #if defined(CONFIG_MPC83xx)
 	/* There are other clocks in the MPC83XX */
@@ -85,6 +82,12 @@ struct arch_global_data {
 	u32 i2c1_clk;
 	u32 i2c2_clk;
 #endif
+#if defined(CONFIG_QE)
+	u32 qe_clk;
+	u32 brg_clk;
+	uint mp_alloc_base;
+	uint mp_alloc_top;
+#endif /* CONFIG_QE */
 };
 
 /*
@@ -107,11 +110,6 @@ typedef	struct	global_data {
 #if defined(CONFIG_FSL_ESDHC)
 	u32 sdhc_clk;
 #endif
-#if defined(CONFIG_QE)
-	u32 qe_clk;
-	uint mp_alloc_base;
-	uint mp_alloc_top;
-#endif /* CONFIG_QE */
 #if defined(CONFIG_FSL_LAW)
 	u32 used_laws;
 #endif
diff --git a/drivers/qe/fdt.c b/drivers/qe/fdt.c
index 1a123b8..5a0f277 100644
--- a/drivers/qe/fdt.c
+++ b/drivers/qe/fdt.c
@@ -75,16 +75,16 @@ error:
 void ft_qe_setup(void *blob)
 {
 	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
-		"bus-frequency", gd->qe_clk, 1);
+		"bus-frequency", gd->arch.qe_clk, 1);
 	do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
 		"brg-frequency", gd->arch.brg_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
-		"clock-frequency", gd->qe_clk, 1);
+		"clock-frequency", gd->arch.qe_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
-		"bus-frequency", gd->qe_clk, 1);
+		"bus-frequency", gd->arch.qe_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe",
 		"brg-frequency", gd->arch.brg_clk, 1);
 	do_fixup_by_compat_u32(blob, "fsl,qe-gtm",
-		"clock-frequency", gd->qe_clk / 2, 1);
+		"clock-frequency", gd->arch.qe_clk / 2, 1);
 	fdt_fixup_qe_firmware(blob);
 }
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 72c585c..5fd2135 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -58,21 +58,22 @@ uint qe_muram_alloc(uint size, uint align)
 	uint	savebase;
 
 	align_mask = align - 1;
-	savebase = gd->mp_alloc_base;
+	savebase = gd->arch.mp_alloc_base;
 
-	if ((off = (gd->mp_alloc_base & align_mask)) != 0)
-		gd->mp_alloc_base += (align - off);
+	off = gd->arch.mp_alloc_base & align_mask;
+	if (off != 0)
+		gd->arch.mp_alloc_base += (align - off);
 
 	if ((off = size & align_mask) != 0)
 		size += (align - off);
 
-	if ((gd->mp_alloc_base + size) >= gd->mp_alloc_top) {
-		gd->mp_alloc_base = savebase;
+	if ((gd->arch.mp_alloc_base + size) >= gd->arch.mp_alloc_top) {
+		gd->arch.mp_alloc_base = savebase;
 		printf("%s: ran out of ram.\n",  __FUNCTION__);
 	}
 
-	retloc = gd->mp_alloc_base;
-	gd->mp_alloc_base += size;
+	retloc = gd->arch.mp_alloc_base;
+	gd->arch.mp_alloc_base += size;
 
 	memset((void *)&qe_immr->muram[retloc], 0, size);
 
@@ -183,8 +184,8 @@ void qe_init(uint qe_base)
 	out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
 #endif
 
-	gd->mp_alloc_base = QE_DATAONLY_BASE;
-	gd->mp_alloc_top = gd->mp_alloc_base + QE_DATAONLY_SIZE;
+	gd->arch.mp_alloc_base = QE_DATAONLY_BASE;
+	gd->arch.mp_alloc_top = gd->arch.mp_alloc_base + QE_DATAONLY_SIZE;
 
 	qe_sdma_init();
 	qe_snums_init();
-- 
1.7.7.3