[U-Boot] [PATCH v2 6/8] omap_gpmc: BCH8 support (ELM based)

Peter Korsgaard jacmet at sunsite.dk
Sat Nov 17 20:13:52 CET 2012


>>>>> "Andreas" == Andreas Bießmann <andreas.devel at googlemail.com> writes:

Hi,

 >> No, please not. Having more than 1 OOB layout on the same NAND device
 >> leads to all kind of complications. There has also been kernel patches
 >> posted for the ELM, so IMHO the only sane option for am33xx is BCH8
 >> everywhere (with the ROM layout).

 Andreas> Ok, I understand your point here. But there are device
 Andreas> combinations out there that do not match!  We have an AM37xx
 Andreas> with some micron NAND that requires 1bit ECC for the first
 Andreas> page (if less than 1000 erase cycle). But 4bit ECC for the
 Andreas> rest of the device. With the 1bit for first page it does fit
 Andreas> to the ROM requirements of that SoC but unfortunately we can
 Andreas> not use the same OOB layout on the whole device, cause the ROM
 Andreas> can only do the 1bit hamming ECC.  I think there are other
 Andreas> boards out there facing the same problem. I have to recheck
 Andreas> for example the devkit8000 which is a mainlined development
 Andreas> device some users based their products on (as we do).

Sure, reality tends to be more complicated than that. The different
SoCs, Nand devices and projects have different requirements. Notice that
this patch is specifically about the Error Location Module present on
E.G. am33xx and omap4, where the ROM also uses BCH encoding.

-- 
Bye, Peter Korsgaard


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