[U-Boot] U-Boot for MIPS AR7161

[Dmytro]

> commands used in openocd through a telnet connection to 127.0.0.1 4444:
> reset
> halt
> reset
> mww 0xb8060008 3
> mww 0xb806000c 0x12c
> halt
> mww 0xb8050000 0x00090828
> mww 0xb8050000 0x00050828
> mww 0xb8050000 0x00040828
> mww 0xb8050008 2
> mww 0xb8050008 3
> halt
> reset init
> load_image 8Muboot_RAM_version.bin 0x80000000
> resume 0x80000000

First:
You somehow use the initialization commands from ar724x CPU for ar71xx
CPU. If you do not see the difference, you do not understand what you
count. You already have a configuration file ar71xx.cfg <= it enough.
The fact that a ar71xx nSRST (unlike ar724x, where nSRST replaced by
RST). The difference is significant for a soft reset / restart the
processor.

I also do not see a response from the CPU when you transfer mode
processor reset or halt, probably something you have not connected
properly. Or launch openocd incorrectly (not set the program
configuration file for CPU).

Secondly:
You'll probably need your own loader platform AP96 modified so that it
removed all the prerequisites for restarting the processor at boot
uboot. Also in the source of any processor is a function of
LOWLEVEL_INIT, it is virtually repeated initialization ar71xx.cfg, so
this function must be disabled or removed to the new RAM bootloader
version, as if it will stay, we just reboot the processor at boot
uboot via jtag.

Considering your experience and knowledge, I suggest you just unsolder
flash memory and an external programmer to flash it.

But if all you have decided to go to the end, or you need a JTAG
fundamentally, I can put a patch for RAM_uboot AR724x (AP99 platform),
so you can make the example of his version of the loader for AR71xx
(AP96 platform).