[U-Boot] [PATCH 03/10] am33xx: Stop using PHYS_DRAM_1 define
Tom Rini
trini at ti.com
Fri Aug 2 22:26:08 CEST 2013
We defined PHYS_DRAM_1 to 0x80000000 (start of DRAM) and then used this
for CONFIG_SYS_SDRAM_BASE. But then we kept on referencing PHYS_DRAM_1
in other places. Change to directly setting CONFIG_SYS_DRAM_BASE and
then using that name in code.
Signed-off-by: Tom Rini <trini at ti.com>
---
board/isee/igep0033/board.c | 2 +-
board/phytec/pcm051/board.c | 2 +-
board/ti/am335x/board.c | 2 +-
board/ti/ti814x/evm.c | 2 +-
include/configs/igep0033.h | 3 +--
include/configs/pcm051.h | 5 ++---
include/configs/ti814x_evm.h | 5 ++---
7 files changed, 9 insertions(+), 12 deletions(-)
diff --git a/board/isee/igep0033/board.c b/board/isee/igep0033/board.c
index c0f0c0d..7a66e33 100644
--- a/board/isee/igep0033/board.c
+++ b/board/isee/igep0033/board.c
@@ -119,7 +119,7 @@ void s_init(void)
*/
int board_init(void)
{
- gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
index 6291d03..77202f7 100644
--- a/board/phytec/pcm051/board.c
+++ b/board/phytec/pcm051/board.c
@@ -135,7 +135,7 @@ int board_init(void)
{
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
- gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0;
}
diff --git a/board/ti/am335x/board.c b/board/ti/am335x/board.c
index 728afc2..88663ea 100644
--- a/board/ti/am335x/board.c
+++ b/board/ti/am335x/board.c
@@ -371,7 +371,7 @@ int board_init(void)
STNOR_GPMC_CONFIG5, STNOR_GPMC_CONFIG6, STNOR_GPMC_CONFIG7 };
#endif
- gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
gpmc_init();
diff --git a/board/ti/ti814x/evm.c b/board/ti/ti814x/evm.c
index c469645..26d2f9b 100644
--- a/board/ti/ti814x/evm.c
+++ b/board/ti/ti814x/evm.c
@@ -161,7 +161,7 @@ void s_init(void)
*/
int board_init(void)
{
- gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+ gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
return 0;
}
diff --git a/include/configs/igep0033.h b/include/configs/igep0033.h
index e318c74..f520ef8 100644
--- a/include/configs/igep0033.h
+++ b/include/configs/igep0033.h
@@ -127,10 +127,9 @@
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
-#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1GB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
/* Platform/Board specific defs */
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
index 62ffc67..b182d50 100644
--- a/include/configs/pcm051.h
+++ b/include/configs/pcm051.h
@@ -118,7 +118,7 @@
* memtest works on 8 MB in DRAM after skipping 32MB from
* start addr of ram disk
*/
-#define CONFIG_SYS_MEMTEST_START (PHYS_DRAM_1 + (64 * 1024 * 1024))
+#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + (64 << 20))
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
+ (8 * 1024 * 1024))
@@ -142,10 +142,9 @@
/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */
-#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 19) /* 512MiB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
/* Platform/Board specific defs */
diff --git a/include/configs/ti814x_evm.h b/include/configs/ti814x_evm.h
index 2428f9d..daad14c 100644
--- a/include/configs/ti814x_evm.h
+++ b/include/configs/ti814x_evm.h
@@ -112,7 +112,7 @@
/* Boot Argument Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
-#define CONFIG_SYS_MEMTEST_START PHYS_DRAM_1
+#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START \
+ PHYS_DRAM_1_SIZE - (8 << 12))
@@ -132,11 +132,10 @@
* Physical Memory Map
*/
#define CONFIG_NR_DRAM_BANKS 1 /* 1 banks of DRAM */
-#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */
#define PHYS_DRAM_1_SIZE 0x20000000 /* 512MB */
#define CONFIG_MAX_RAM_BANK_SIZE (1024 << 20) /* 1024MB */
-#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1
+#define CONFIG_SYS_SDRAM_BASE 0x80000000
#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
GENERATED_GBL_DATA_SIZE)
--
1.7.9.5
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