[U-Boot] [PATCH v2 02/10] sf: Add extended read commands support

Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
Wed Aug 7 22:09:35 CEST 2013


Current sf uses FAST_READ command, this patch adds support to
use the different/extended read command.

This implementation will determine the fastest command by taking
the supported commands from the flash and the controller, controller
is always been a priority.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
Changes for v2:
	- none

 drivers/mtd/spi/spi_flash_ops.c   |   2 +-
 drivers/mtd/spi/spi_flash_probe.c | 169 ++++++++++++++++++++------------------
 drivers/spi/spi.c                 |   2 +
 include/spi.h                     |   2 +
 include/spi_flash.h               |  25 ++++++
 5 files changed, 121 insertions(+), 79 deletions(-)

diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index c408e27..a0ea3f9 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -273,7 +273,7 @@ int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
 		return 0;
 	}
 
-	cmd[0] = CMD_READ_ARRAY_FAST;
+	cmd[0] = flash->read_cmd;
 	cmd[4] = 0x00;
 
 	while (len) {
diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c
index 86fbb07..82d77de 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -26,6 +26,7 @@ DECLARE_GLOBAL_DATA_PTR;
  * @ext_jedec:		Device ext_jedec ID
  * @sector_size:	Sector size of this device
  * @nr_sectors:		No.of sectors on this device
+ * @rd_cmd:		Read command
  * @flags:		Importent param, for flash specific behaviour
  */
 struct spi_flash_params {
@@ -34,103 +35,104 @@ struct spi_flash_params {
 	u16 ext_jedec;
 	u32 sector_size;
 	u32 nr_sectors;
+	u8 rd_cmd;
 	u16 flags;
 };
 
 static const struct spi_flash_params spi_flash_params_table[] = {
 #ifdef CONFIG_SPI_FLASH_ATMEL		/* ATMEL */
-	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	       SECT_4K},
-	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	       SECT_4K},
-	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	       SECT_4K},
-	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	       SECT_4K},
-	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	       SECT_4K},
-	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	       SECT_4K},
-	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	       SECT_4K},
+	{"AT45DB011D",	   0x1f2200, 0x0,	64 * 1024,     4,	      0,	 SECT_4K},
+	{"AT45DB021D",	   0x1f2300, 0x0,	64 * 1024,     8,	      0,	 SECT_4K},
+	{"AT45DB041D",	   0x1f2400, 0x0,	64 * 1024,     8,	      0,	 SECT_4K},
+	{"AT45DB081D",	   0x1f2500, 0x0,	64 * 1024,    16,	      0,	 SECT_4K},
+	{"AT45DB161D",	   0x1f2600, 0x0,	64 * 1024,    32,	      0,	 SECT_4K},
+	{"AT45DB321D",	   0x1f2700, 0x0,	64 * 1024,    64,	      0,	 SECT_4K},
+	{"AT45DB641D",	   0x1f2800, 0x0,	64 * 1024,   128,	      0,	 SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_EON		/* EON */
-	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	             0},
-	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	       SECT_4K},
-	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	             0},
+	{"EN25Q32B",	   0x1c3016, 0x0,	64 * 1024,    64,	      0,	       0},
+	{"EN25Q64",	   0x1c3017, 0x0,	64 * 1024,   128,	      0,	 SECT_4K},
+	{"EN25Q128B",	   0x1c3018, 0x0,       64 * 1024,   256,	      0,	       0},
 #endif
 #ifdef CONFIG_SPI_FLASH_GIGADEVICE	/* GIGADEVICE */
-	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	       SECT_4K},
-	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	       SECT_4K},
+	{"GD25Q64B",	   0xc84017, 0x0,	64 * 1024,   128,	      0,	 SECT_4K},
+	{"GD25LQ32",	   0xc86016, 0x0,	64 * 1024,    64,	      0,	 SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_MACRONIX	/* MACRONIX */
-	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	             0},
-	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	             0},
-	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	             0},
-	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	             0},
-	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	             0},
-	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256,	             0},
-	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256,	             0},
+	{"MX25L4005",	   0xc22013, 0x0,	64 * 1024,     8,	      0,	       0},
+	{"MX25L8005",	   0xc22014, 0x0,	64 * 1024,    16,	      0,	       0},
+	{"MX25L1605D",	   0xc22015, 0x0,	64 * 1024,    32,	      0,	       0},
+	{"MX25L3205D",	   0xc22016, 0x0,	64 * 1024,    64,	      0,	       0},
+	{"MX25L6405D",	   0xc22017, 0x0,	64 * 1024,   128,	      0,	       0},
+	{"MX25L12805",	   0xc22018, 0x0,	64 * 1024,   256,	      0,	       0},
+	{"MX25L12855E",	   0xc22618, 0x0,	64 * 1024,   256,	      0,	       0},
 #endif
 #ifdef CONFIG_SPI_FLASH_SPANSION	/* SPANSION */
-	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	             0},
-	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	             0},
-	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	             0},
-	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	             0},
-	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64,	             0},
-	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256,	             0},
-	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64,	             0},
-	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128,	             0},
-	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256,		     0},
-	{"S25FL256S_64K",  0x010219, 0x4d01,    64 * 1024,   512,	             0},
-	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024,	             0},
+	{"S25FL008A",	   0x010213, 0x0,	64 * 1024,    16,	      0,               0},
+	{"S25FL016A",	   0x010214, 0x0,	64 * 1024,    32,	      0,               0},
+	{"S25FL032A",	   0x010215, 0x0,	64 * 1024,    64,	      0,	       0},
+	{"S25FL064A",	   0x010216, 0x0,	64 * 1024,   128,	      0,               0},
+	{"S25FL128P_256K", 0x012018, 0x0300,   256 * 1024,    64, READ_CMD_FULL,               0},
+	{"S25FL128P_64K",  0x012018, 0x0301,    64 * 1024,   256, READ_CMD_FULL,	       0},
+	{"S25FL032P",	   0x010215, 0x4d00,    64 * 1024,    64, READ_CMD_FULL,	       0},
+	{"S25FL064P",	   0x010216, 0x4d00,    64 * 1024,   128, READ_CMD_FULL,	       0},
+	{"S25FL128S_64K",  0x012018, 0x4d01,    64 * 1024,   256, READ_CMD_FULL,       	       0},
+	{"S25FL256S_64K",  0x010219, 0x4d01,    64 * 1024,   512, READ_CMD_FULL,               0},
+	{"S25FL512S_64K",  0x010220, 0x4d01,    64 * 1024,  1024, READ_CMD_FULL,               0},
 #endif
 #ifdef CONFIG_SPI_FLASH_STMICRO		/* STMICRO */
-	{"M25P10",	   0x202011, 0x0,       32 * 1024,     4,	             0},
-	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	             0},
-	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	             0},
-	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	             0},
-	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	             0},
-	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	             0},
-	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	             0},
-	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	             0},
-	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64,	       SECT_4K},
-	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64,	       SECT_4K},
-	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128,	       SECT_4K},
-	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128,	       SECT_4K},
-	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256,	       SECT_4K},
-	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256,	       SECT_4K},
-	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512,	       SECT_4K},
-	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512,	       SECT_4K},
-	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024,      E_FSR | SECT_4K},
-	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024,      E_FSR | SECT_4K},
-	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048,      E_FSR | SECT_4K},
-	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048,      E_FSR | SECT_4K},
+	{"M25P10",	   0x202011, 0x0,       32 * 1024,     4,	      0,               0},
+	{"M25P20",	   0x202012, 0x0,       64 * 1024,     4,	      0,               0},
+	{"M25P40",	   0x202013, 0x0,       64 * 1024,     8,	      0,               0},
+	{"M25P80",	   0x202014, 0x0,       64 * 1024,    16,	      0,               0},
+	{"M25P16",	   0x202015, 0x0,       64 * 1024,    32,	      0,               0},
+	{"M25P32",	   0x202016, 0x0,       64 * 1024,    64,	      0,               0},
+	{"M25P64",	   0x202017, 0x0,       64 * 1024,   128,	      0,               0},
+	{"M25P128",	   0x202018, 0x0,      256 * 1024,    64,	      0,               0},
+	{"N25Q32",	   0x20ba16, 0x0,       64 * 1024,    64, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q32A",	   0x20bb16, 0x0,       64 * 1024,    64, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q64",	   0x20ba17, 0x0,       64 * 1024,   128, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q64A",	   0x20bb17, 0x0,       64 * 1024,   128, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q128",	   0x20ba18, 0x0,       64 * 1024,   256, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q128A",	   0x20bb18, 0x0,       64 * 1024,   256, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q256",	   0x20ba19, 0x0,       64 * 1024,   512, READ_CMD_FULL,	 SECT_4K},
+	{"N25Q256A",	   0x20bb19, 0x0,       64 * 1024,   512, READ_CMD_FULL,         SECT_4K},
+	{"N25Q512",	   0x20ba20, 0x0,       64 * 1024,  1024, READ_CMD_FULL, E_FSR | SECT_4K},
+	{"N25Q512A",	   0x20bb20, 0x0,       64 * 1024,  1024, READ_CMD_FULL, E_FSR | SECT_4K},
+	{"N25Q1024",	   0x20ba21, 0x0,       64 * 1024,  2048, READ_CMD_FULL, E_FSR | SECT_4K},
+	{"N25Q1024A",	   0x20bb21, 0x0,       64 * 1024,  2048, READ_CMD_FULL, E_FSR | SECT_4K},
 #endif
 #ifdef CONFIG_SPI_FLASH_SST		/* SST */
-	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,     SECT_4K | SST_WP},
-	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,     SECT_4K | SST_WP},
-	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,     SECT_4K | SST_WP},
-	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,     SECT_4K | SST_WP},
-	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	       SECT_4K},
-	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,     SECT_4K | SST_WP},
-	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,     SECT_4K | SST_WP},
-	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,     SECT_4K | SST_WP},
-	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,     SECT_4K | SST_WP},
-	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,     SECT_4K | SST_WP},
+	{"SST25VF040B",	   0xbf258d, 0x0,	64 * 1024,     8,             0, SECT_4K | SST_WP},
+	{"SST25VF080B",	   0xbf258e, 0x0,	64 * 1024,    16,     	      0, SECT_4K | SST_WP},
+	{"SST25VF016B",	   0xbf2541, 0x0,	64 * 1024,    32,             0, SECT_4K | SST_WP},
+	{"SST25VF032B",	   0xbf254a, 0x0,	64 * 1024,    64,             0, SECT_4K | SST_WP},
+	{"SST25VF064C",	   0xbf254b, 0x0,	64 * 1024,   128,	      0,          SECT_4K},
+	{"SST25WF512",	   0xbf2501, 0x0,	64 * 1024,     1,             0, SECT_4K | SST_WP},
+	{"SST25WF010",	   0xbf2502, 0x0,	64 * 1024,     2,             0, SECT_4K | SST_WP},
+	{"SST25WF020",	   0xbf2503, 0x0,	64 * 1024,     4,             0, SECT_4K | SST_WP},
+	{"SST25WF040",	   0xbf2504, 0x0,	64 * 1024,     8,             0, SECT_4K | SST_WP},
+	{"SST25WF080",	   0xbf2505, 0x0,	64 * 1024,    16,             0, SECT_4K | SST_WP},
 #endif
 #ifdef CONFIG_SPI_FLASH_WINBOND		/* WINBOND */
-	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,		SEC_4K},
-	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,		SEC_4K},
-	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,		SEC_4K},
-	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,		SEC_4K},
-	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,		SEC_4K},
-	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,		SEC_4K},
-	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,		SEC_4K},
-	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16,		SEC_4K},
-	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32,		SEC_4K},
-	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64,		SEC_4K},
-	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128,	       SEC_32K},
-	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256,		SEC_4K},
-	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512,		SEC_4K},
-	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16,		SEC_4K},
-	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32,		SEC_4K},
-	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64,		SEC_4K},
-	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128,		SEC_4K},
-	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256,		SEC_4K},
+	{"W25P80",	   0xef2014, 0x0,	64 * 1024,    16,	      0,	  SECT_4K},
+	{"W25P16",	   0xef2015, 0x0,	64 * 1024,    32,	      0,	  SECT_4K},
+	{"W25P32",	   0xef2016, 0x0,	64 * 1024,    64,	      0,	  SECT_4K},
+	{"W25X40",	   0xef3013, 0x0,	64 * 1024,     8,	      0, 	  SECT_4K},
+	{"W25X16",	   0xef3015, 0x0,	64 * 1024,    32,	      0,	  SECT_4K},
+	{"W25X32",	   0xef3016, 0x0,	64 * 1024,    64,	      0,          SECT_4K},
+	{"W25X64",	   0xef3017, 0x0,	64 * 1024,   128,	      0,	  SECT_4K},
+	{"W25Q80BL",	   0xef4014, 0x0,	64 * 1024,    16, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q16CL",	   0xef4015, 0x0,	64 * 1024,    32, READ_CMD_FULL, 	  SECT_4K},
+	{"W25Q32BV",	   0xef4016, 0x0,	64 * 1024,    64, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q64CV",	   0xef4017, 0x0,	64 * 1024,   128, READ_CMD_FULL,	 SECT_32K},
+	{"W25Q128BV",	   0xef4018, 0x0,	64 * 1024,   256, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q256",	   0xef4019, 0x0,	64 * 1024,   512, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q80BW",	   0xef5014, 0x0,	64 * 1024,    16, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q16DW",	   0xef6015, 0x0,	64 * 1024,    32, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q32DW",	   0xef6016, 0x0,	64 * 1024,    64, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q64DW",	   0xef6017, 0x0,	64 * 1024,   128, READ_CMD_FULL,	  SECT_4K},
+	{"W25Q128FW",	   0xef6018, 0x0,	64 * 1024,   256, READ_CMD_FULL,	  SECT_4K},
 #endif
 	/*
 	 * Note:
@@ -154,6 +156,7 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
 	int i;
 	u16 jedec = idcode[1] << 8 | idcode[2];
 	u16 ext_jedec = idcode[3] << 8 | idcode[4];
+	u8 cmd;
 
 	/* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
 	for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
@@ -199,6 +202,16 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
 	flash->sector_size = params->sector_size;
 	flash->size = flash->sector_size * params->nr_sectors;
 
+	/* Look for the fastest read cmd */
+	cmd = fls(params->rd_cmd & flash->spi->rd_cmd);
+	if (cmd) {
+		cmd = spi_read_cmds_array[cmd - 1];
+		flash->read_cmd = cmd;
+	} else {
+		/* Go for controller supported command */
+		flash->read_cmd = flash->spi->rd_cmd;
+	}
+
 	/* Compute erase sector and command */
 	if (params->flags & SECT_4K) {
 		flash->erase_cmd = CMD_ERASE_4K;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index ea39d1a..0ac9fab 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <malloc.h>
 #include <spi.h>
+#include <spi_flash.h>
 
 void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 			 unsigned int cs)
@@ -20,6 +21,7 @@ void *spi_do_alloc_slave(int offset, int size, unsigned int bus,
 		slave = (struct spi_slave *)(ptr + offset);
 		slave->bus = bus;
 		slave->cs = cs;
+		slave->rd_cmd = CMD_READ_ARRAY_FAST;
 	}
 
 	return ptr;
diff --git a/include/spi.h b/include/spi.h
index c0dab57..093847e 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -40,11 +40,13 @@
  *   cs:	ID of the chip select connected to the slave.
  *   max_write_size:	If non-zero, the maximum number of bytes which can
  *		be written at once, excluding command bytes.
+ *   rd_cmd:	Read command.
  */
 struct spi_slave {
 	unsigned int	bus;
 	unsigned int	cs;
 	unsigned int max_write_size;
+	u8 rd_cmd;
 };
 
 /*-----------------------------------------------------------------------
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 18fc6a7..fe7c02c 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -30,6 +30,29 @@
 #define SECT_32K		(1 << 1)
 #define E_FSR			(1 << 2)
 
+/* Read commands */
+#define CMD_READ_ARRAY_SLOW		0x03
+#define CMD_READ_ARRAY_FAST		0x0b
+#define CMD_READ_DUAL_OUTPUT_FAST	0x3b
+#define CMD_READ_DUAL_IO_FAST		0xbb
+
+static u32 spi_read_cmds_array[] = {
+	CMD_READ_ARRAY_SLOW,
+	CMD_READ_ARRAY_FAST,
+	CMD_READ_DUAL_OUTPUT_FAST,
+	CMD_READ_DUAL_IO_FAST,
+};
+
+enum spi_read_cmds {
+	ARRAY_SLOW = 1 << 0,
+	ARRAY_FAST = 1 << 1,
+	DUAL_OUTPUT_FAST = 1 << 2,
+	DUAL_IO_FAST = 1 << 3,
+};
+
+#define READ_CMD_FULL	ARRAY_SLOW | ARRAY_FAST | DUAL_OUTPUT_FAST | \
+			DUAL_IO_FAST
+
 /* SST specific macros */
 #ifdef CONFIG_SPI_FLASH_SST
 # define SST_WP			0x01	/* Supports AAI word program */
@@ -51,6 +74,7 @@
  * @bank_curr:		Current flash bank
  * @poll_cmd:		Poll cmd - for flash erase/program
  * @erase_cmd:		Erase cmd 4K, 32K, 64K
+ * @read_cmd:		Read cmd SA, FA, DOF, DIOF
  * @memory_map:		Address of read-only SPI flash access
  * @read:		Flash read ops
  * @write:		Flash write ops
@@ -71,6 +95,7 @@ struct spi_flash {
 #endif
 	u8 poll_cmd;
 	u8 erase_cmd;
+	u8 read_cmd;
 
 	void *memory_map;
 	int (*read)(struct spi_flash *flash, u32 offset, size_t len, void *buf);
-- 
1.8.3




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