[U-Boot] [PATCH v2 05/10] sf: Set quad enable bit support

Jagannadha Sutradharudu Teki jagannadha.sutradharudu-teki at xilinx.com
Wed Aug 7 22:09:38 CEST 2013


This patch provides support to set the quad enable bit on flash.

quad enable bit needs to set before performing any quad IO
operations on respective SPI flashes.

Signed-off-by: Jagannadha Sutradharudu Teki <jaganna at xilinx.com>
---
Changes for v2:
	- none

 drivers/mtd/spi/spi_flash_internal.h |  5 +++++
 drivers/mtd/spi/spi_flash_ops.c      | 24 ++++++++++++++++++++++++
 drivers/mtd/spi/spi_flash_probe.c    |  9 +++++++++
 3 files changed, 38 insertions(+)

diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
index 580c06b..8257020 100644
--- a/drivers/mtd/spi/spi_flash_internal.h
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -22,6 +22,7 @@
 #define CMD_PAGE_PROGRAM		0x02
 #define CMD_WRITE_DISABLE		0x04
 #define CMD_READ_STATUS			0x05
+#define CMD_READ_CONFIG			0x35
 #define CMD_FLAG_STATUS			0x70
 #define CMD_WRITE_ENABLE		0x06
 #define CMD_ERASE_4K			0x20
@@ -41,6 +42,7 @@
 
 /* Common status */
 #define STATUS_WIP			0x01
+#define STATUS_QEB			0x02
 #define STATUS_PEC			0x80
 
 /* Send a single-byte command to the device and read the response */
@@ -97,6 +99,9 @@ int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr);
 /* Program the config register */
 int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr);
 
+/* Set quad enbale bit */
+int spi_flash_set_qeb(struct spi_flash *flash);
+
 #ifdef CONFIG_SPI_FLASH_BAR
 /* Program the bank address register */
 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel);
diff --git a/drivers/mtd/spi/spi_flash_ops.c b/drivers/mtd/spi/spi_flash_ops.c
index c1c4465..defd88c 100644
--- a/drivers/mtd/spi/spi_flash_ops.c
+++ b/drivers/mtd/spi/spi_flash_ops.c
@@ -62,6 +62,30 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr)
 	return 0;
 }
 
+int spi_flash_set_qeb(struct spi_flash *flash)
+{
+	u8 qeb_status;
+	u8 cmd;
+	int ret;
+
+	cmd = CMD_READ_CONFIG;
+	ret = spi_flash_read_common(flash, &cmd, 1, &qeb_status, 1);
+	if (ret < 0) {
+		debug("SF: fail to read config register\n");
+		return ret;
+	}
+
+	if (qeb_status & STATUS_QEB) {
+		debug("SF: Quad enable bit is already set\n");
+	} else {
+		ret = spi_flash_cmd_write_config(flash, STATUS_QEB);
+		if (ret < 0)
+			return ret;
+	}
+
+	return ret;
+}
+
 #ifdef CONFIG_SPI_FLASH_BAR
 int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
 {
diff --git a/drivers/mtd/spi/spi_flash_probe.c b/drivers/mtd/spi/spi_flash_probe.c
index 45554cc..0fc15cf 100644
--- a/drivers/mtd/spi/spi_flash_probe.c
+++ b/drivers/mtd/spi/spi_flash_probe.c
@@ -224,6 +224,15 @@ struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
 		flash->write_cmd = flash->spi->wr_cmd;
 	}
 
+	/* Set the quad enable bit - only for quad commands */
+	if ((flash->read_cmd == CMD_READ_QUAD_OUTPUT_FAST) ||
+	    (flash->write_cmd == CMD_QUAD_PAGE_PROGRAM)) {
+		if (spi_flash_set_qeb(flash)) {
+			debug("SF: Fail to set quad enable bit\n");
+			return NULL;
+		}
+	}
+
 	/* Compute erase sector and command */
 	if (params->flags & SECT_4K) {
 		flash->erase_cmd = CMD_ERASE_4K;
-- 
1.8.3




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