[U-Boot] [PATCH 1/2] ARM: tegra: Make cache line size SoC specific

[Tom Warren]

Sure, your mkimage patch, and Thierry's 2 cache patches have been applied to u-boot-tegra/next (after rebasing next against Albert's ARM master), build tested (all Tegra boards build fine), and pushed to denx. Also updated u-boot-tegra/master w/Albert's ARM TOT.

Sorry for the delay, really busy w/new stuff. Ping me if I get behind again.

Thanks,

Tom

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Wednesday, August 14, 2013 9:05 AM
> To: Tom Warren
> Cc: Thierry Reding; u-boot at lists.denx.de; Thierry Reding; Stephen Warren
> Subject: Re: [U-Boot] [PATCH 1/2] ARM: tegra: Make cache line size SoC
> specific
> 
> On 07/18/2013 01:13 PM, Thierry Reding wrote:
> > From: Thierry Reding <treding at nvidia.com>
> >
> > Currently all Tegra SoCs are assumed to have 32 byte cache lines. This
> > isn't true for Tegra114, however, which uses 4 Cortex-A15 cores and
> > therefore uses a cache line size of 64 bytes. Move the cache line size
> > setting to the per-SoC common configuration file.
> 
> Tom, can these two patches be applied please?
-----------------------------------------------------------------------------------
This email message is for the sole use of the intended recipient(s) and may contain
confidential information.  Any unauthorized review, use, disclosure or distribution
is prohibited.  If you are not the intended recipient, please contact the sender by
reply email and destroy all copies of the original message.
-----------------------------------------------------------------------------------