[U-Boot] Albert/Tom -- could we get patch applied or some feedback (was Re: [PATCH v6 1/1] socfpga: Adding configuration for development kit)

[Pavel Machek]

Hi!

> Albert, Tom.... this patch has been here for a week, without any
> comments. As far as I can tell, it is pretty much perfect. Can we get
> any comments on it, or (better), get it applied?

Another week passed, and nothing happens. Is there just slow holiday
time, or are we doing something wrong?

Thanks,
								Pavel

> If you excuse one extra newline at end of file,
> [PATCH v6 1/1] socfpga: Creating driver for Reset Manager
> is in good shape too, and applying it would be nice.
> 
> Thanks,
> 								Pavel
> 
> 
> > Separating the configuration file for Virtual
> > Target and real hardware Cyclone V development kit
> > 
> > Signed-off-by: Chin Liang See <clsee at altera.com>
> > Reviewed-by: Pavel Machek <pavel at denx.de>
> > Cc: Wolfgang Denk <wd at denx.de>
> > Cc: Pavel Machek <pavel at denx.de>
> > Cc: Dinh Nguyen <dinguyen at altera.com>
> > Cc: Tom Rini <trini at ti.com>
> > Cc: Albert Aribaud <albert.u.boot at aribaud.net>
> > ---
> > Changes for v6:
> > - Re-shuffle the change list
> > Changes for v5:
> > - Added Reviewed-by: Pavel Machek
> > - Cc: Tom Rini
> > Changes for v4:
> > - Added change log for each revision change
> > Changes for v3:
> > - Fixed the long subject of the patch
> > Changes for v2:
> > - Fixed the word wrap issue within patch
> > ---
> >  include/configs/socfpga_cyclone5.h |   28 +++++++++++++++++++++-------
> >  1 file changed, 21 insertions(+), 7 deletions(-)
> > 
> > diff --git a/include/configs/socfpga_cyclone5.h b/include/configs/socfpga_cyclone5.h
> > index b5a7a9a..06aeba6 100644
> > --- a/include/configs/socfpga_cyclone5.h
> > +++ b/include/configs/socfpga_cyclone5.h
> > @@ -11,6 +11,8 @@
> >  /*
> >   * High level configuration
> >   */
> > +/* Virtual target or real hardware */
> > +#define CONFIG_SOCFPGA_VIRTUAL_TARGET
> >  
> >  #define CONFIG_ARMV7
> >  #define CONFIG_L2_OFF
> > @@ -21,11 +23,12 @@
> >  #define CONFIG_SINGLE_BOOTLOADER
> >  #define CONFIG_SOCFPGA
> >  
> > +/* base address for .text section */
> > +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> >  #define CONFIG_SYS_TEXT_BASE		0x08000040
> > -#define V_NS16550_CLK			1000000
> > -#define CONFIG_BAUDRATE			57600
> > -#define CONFIG_SYS_HZ			1000
> > -#define CONFIG_TIMER_CLOCK_KHZ		2400
> > +#else
> > +#define CONFIG_SYS_TEXT_BASE		0x01000040
> > +#endif
> >  #define CONFIG_SYS_LOAD_ADDR		0x7fc0
> >  
> >  /* Console I/O Buffer Size */
> > @@ -154,7 +157,7 @@
> >  /* SDRAM Bank #1 */
> >  #define CONFIG_SYS_SDRAM_BASE		0x00000000
> >  /* SDRAM memory size */
> > -#define PHYS_SDRAM_1_SIZE		0x80000000
> > +#define PHYS_SDRAM_1_SIZE		0x40000000
> >  
> >  #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
> >  #define CONFIG_SYS_MEMTEST_START	0x00000000
> > @@ -170,8 +173,13 @@
> >  #define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
> >  #define CONFIG_CONS_INDEX               1
> >  #define CONFIG_SYS_NS16550_COM1		UART0_BASE
> > -
> >  #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200}
> > +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > +#define V_NS16550_CLK			1000000
> > +#else
> > +#define V_NS16550_CLK			100000000
> > +#endif
> > +#define CONFIG_BAUDRATE			115200
> >  
> >  /*
> >   * FLASH
> > @@ -184,9 +192,15 @@
> >  /* This timer use eosc1 where the clock frequency is fixed
> >   * throughout any condition */
> >  #define CONFIG_SYS_TIMERBASE		SOCFPGA_OSC1TIMER0_ADDRESS
> > -
> >  /* reload value when timer count to zero */
> >  #define TIMER_LOAD_VAL			0xFFFFFFFF
> > +/* Timer info */
> > +#define CONFIG_SYS_HZ			1000
> > +#ifdef CONFIG_SOCFPGA_VIRTUAL_TARGET
> > +#define CONFIG_TIMER_CLOCK_KHZ		2400
> > +#else
> > +#define CONFIG_TIMER_CLOCK_KHZ		25000
> > +#endif
> >  
> >  #define CONFIG_ENV_IS_NOWHERE
> >  
> 

-- 
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html