[U-Boot] [PATCH v4 0/8] ARMv7: Add HYP mode switching support

[Nikolay Nikolaev]

Hello,


On Fri, Aug 9, 2013 at 6:03 PM, Andre Przywara <andre.przywara at linaro.org>wrote:

> (for GIT URL and Changelog see below)
>
> ARM CPUs with the virtualization extension have a new mode called
> HYP mode, which allows hypervisors to safely control and monitor
> guests. The current hypervisor implementations (KVM and Xen)
> require the kernel to be entered in that HYP mode.
>
> This patch series introduces a configuration variable
> CONFIG_ARMV7_VIRT which enables code to switch all cores into HYP
> mode. This is done automatically during execution of the bootm
> command.
>
> The process of switching into HYP mode requires the CPU to be in
> secure state initially when entering u-boot, it will then setup some
> register and switch to non-secure state. This requires the GIC to be
> programmed properly first. Explanations about the details are in the
> commit messages of the respective patches.
>
> The patches are structured like this:
> 1/8: prepare header file
> 2/8: add monitor handler (assembly)
> 3/8: add per CPU non-secure switch routine (assembly)
> 4/8: add system wide non-secure setup (C)
> 5/8: trigger non-secure switch during bootm command
> 6/8: add generic SMP functionality
> 7/8: add HYP mode switching
> 8/8: board specific code for ARM Versatile Express TC2
>
> Since up to patch 6/8 this code works on non-virtualization capable
> CPUs also and there has been a request, there is now a second
> configuration variable CONFIG_ARMV7_NONSEC, which omits the final
> HYP mode switch and just goes into non-secure SVC state.
> You can specify either (or none) of them, the code cares about
> the dependency.
>
> The code aims to be as generic as possible, though currently it has
> only been tested on the Versatile Express TC-2 board. The last patch
>

We have "backported" [1] these patches to U-Boot for the ARM Chromebook
(Samsung Exynos5250 SoC). They work without functional changes, including
this last v4.
We can consider the code tested on Exynos5 also.



> thus enables the feature for that board and should serve as an
> example for supporting other boards.
>
> For convenience there is a GIT tree which you can pull these patches
> from ("hypmode_v4" branch):
> git://git.linaro.org/people/aprzywara/u-boot.git
>
> Changes RFC..v1
> * not a dedicated command anymore, code run by bootm & friends
> * protecting code with #ifdefs to avoid unnecessary inclusion and
>   accidental crashing (when accessing restricted registers)
> * moving prototypes to header file to meet checkpatch recommendation
> * adding comment as proposed by Christoffer
>
> Changes v1..v2
> mostly style and code layout changes
> * restructure assembly code to live in a new file and not start.S
> * split smp, nonsec_init and hyp_init to be separate functions
> * used named constants from common header files
> * split C function to be more readable
> * extend comments to be more precise and elaborate
> * add provision to override GIC base address (needed for Arndale?)
> * add configuration variable to enable VExpress specific SMP code
> * use writel/readl for MMIO GIC accesses
> * remove superfluous isb instructions
> * more minor fixes
>
> Changes v2..v3
> * fix clobbering of GICC address actually spoiling the stack
> * do CNTFRQ setup in assembly per core (and not only once per SoC)
> * moving the new code files into arch/arm/cpu/armv7
> * add config variable for doing non-secure switch only
> * use actual HYP and secure instructions mnemonics instead of
>   the encoded byte sequence. This requires more recent compilers.
> * make the identification of the CPU core more robust and saner
> * use enum for error codes and rename them
> * lots of smaller layout and style fixes
>
> Changes v3..v4
> * mask reserved bits in CBAR register
> * move the VExpress board specific SMP code into the board directory
> * embed error reporting in the respective functions and getting
>   rid of the error code enum at all (by popular demand ;-)
> * minor style fixes
>
> Please review and comment!
>
> Contributions and comments to support other boards are welcome.
>
> Andre Przywara (8):
>   ARM: prepare armv7.h to be included from assembly source
>   ARM: add secure monitor handler to switch to non-secure state
>   ARM: add assembly routine to switch to non-secure state
>   ARM: add C function to switch to non-secure state
>   ARM: trigger non-secure state switch during bootm execution
>   ARM: add SMP support for non-secure switch
>   ARM: extend non-secure switch to also go into HYP mode
>   ARM: VExpress: enable ARMv7 virt support for VExpress A15
>
>  arch/arm/cpu/armv7/Makefile             |   5 +
>  arch/arm/cpu/armv7/nonsec_virt.S        | 196
> ++++++++++++++++++++++++++++++++
>  arch/arm/cpu/armv7/virt-v7.c            | 172 ++++++++++++++++++++++++++++
>  arch/arm/include/asm/armv7.h            |  33 +++++-
>  arch/arm/include/asm/gic.h              |  19 ++++
>  arch/arm/lib/bootm.c                    |  18 +++
>  board/armltd/vexpress/Makefile          |   7 +-
>  board/armltd/vexpress/vexpress_common.c |  13 +++
>  board/armltd/vexpress/vexpress_smp.S    |  36 ++++++
>  include/common.h                        |   2 +
>  include/configs/vexpress_ca15_tc2.h     |   4 +-
>  11 files changed, 501 insertions(+), 4 deletions(-)
>  create mode 100644 arch/arm/cpu/armv7/nonsec_virt.S
>  create mode 100644 arch/arm/cpu/armv7/virt-v7.c
>  create mode 100644 arch/arm/include/asm/gic.h
>  create mode 100644 board/armltd/vexpress/vexpress_smp.S
>
> --
> 1.7.12.1
>
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regards,
Nikolay Nikolaev

[1] https://lists.cs.columbia.edu/pipermail/kvmarm/2013-July/006481.html