[U-Boot] [PATCH 3/6 V2] ARM: Change from I2S1 to I2S0 for audio on SMDK5250

[Minkyu Kang]

On 04/08/13 15:44, Dani Krishna Mohan wrote:
> This patch makes the necessary changes for making use of
> I2S0 channel instead of I2S1 channel on smdk board. This
> changes are done to maintain the uniformity to use I2S0 channel.
> 
> Signed-off-by: Dani Krishna Mohan <krishna.md at samsung.com>
> ---
> changes in V2:
> 	- None
>  arch/arm/cpu/armv7/exynos/clock.c         |   13 +++++++++----
>  arch/arm/cpu/armv7/exynos/pinmux.c        |   15 +++++++++++++--
>  arch/arm/include/asm/arch-exynos/clock.h  |    8 +++++---
>  arch/arm/include/asm/arch-exynos/cpu.h    |    2 ++
>  arch/arm/include/asm/arch-exynos/periph.h |    1 +
>  5 files changed, 30 insertions(+), 9 deletions(-)
> 
> diff --git a/arch/arm/cpu/armv7/exynos/clock.c b/arch/arm/cpu/armv7/exynos/clock.c
> index 0cb1a61..2a1b681 100644
> --- a/arch/arm/cpu/armv7/exynos/clock.c
> +++ b/arch/arm/cpu/armv7/exynos/clock.c
> @@ -282,6 +282,9 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
>  		src = readl(&clk->src_peric0);
>  		div = readl(&clk->div_peric3);
>  		break;
> +	case PERIPH_ID_I2S0:
> +		src = readl(&clk->src_mau);
> +		div = readl(&clk->div_mau);
>  	case PERIPH_ID_SPI0:
>  	case PERIPH_ID_SPI1:
>  		src = readl(&clk->src_peric1);
> @@ -1151,8 +1154,10 @@ void exynos5_set_i2s_clk_source(void)
>  	struct exynos5_clock *clk =
>  		(struct exynos5_clock *)samsung_get_base_clock();
>  
> -	clrsetbits_le32(&clk->src_peric1, AUDIO1_SEL_MASK,

you should support audio1 also.
please do not replace, support both of them.

> +	setbits_le32(&clk->src_top2, CLK_SRC_MOUT_EPLL);
> +	clrsetbits_le32(&clk->src_mau, AUDIO_SEL_MASK,
>  			(CLK_SRC_SCLK_EPLL));
> +	setbits_le32(EXYNOS_AUDSS, CLKMUX_ASS);

Don't access base address directly.

>  }
>  
>  int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
> @@ -1169,13 +1174,13 @@ int exynos5_set_i2s_clk_prescaler(unsigned int src_frq,
>  	}
>  
>  	div = (src_frq / dst_frq);
> -	if (div > AUDIO_1_RATIO_MASK) {
> +	if (div > AUDIO_RATIO_MASK) {
>  		debug("%s: Frequency ratio is out of range\n", __func__);
>  		debug("src frq = %d des frq = %d ", src_frq, dst_frq);
>  		return -1;
>  	}
> -	clrsetbits_le32(&clk->div_peric4, AUDIO_1_RATIO_MASK,
> -				(div & AUDIO_1_RATIO_MASK));
> +	clrsetbits_le32(&clk->div_mau, AUDIO_RATIO_MASK,
> +			(div & AUDIO_RATIO_MASK));

ditto.
please support both of them.

>  	return 0;
>  }
>  
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 1b05ebf..59f445a 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -221,9 +221,19 @@ static void exynos5_i2s_config(int peripheral)
>  	int i;
>  	struct exynos5_gpio_part1 *gpio1 =
>  		(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
> +	struct exynos5_gpio_part4 *gpio4 =
> +		(struct exynos5_gpio_part4 *)samsung_get_base_gpio_part4();
>  
> -	for (i = 0; i < 5; i++)
> -		s5p_gpio_cfg_pin(&gpio1->b0, i, GPIO_FUNC(0x02));
> +	switch (peripheral) {
> +	case PERIPH_ID_I2S0:
> +		for (i = 0; i < 5; i++)
> +			s5p_gpio_cfg_pin(&gpio4->z, i, GPIO_FUNC(0x02));
> +		break;
> +	case PERIPH_ID_I2S1:
> +		for (i = 0; i < 5; i++)
> +			s5p_gpio_cfg_pin(&gpio1->b0, i, GPIO_FUNC(0x02));
> +		break;
> +	}
>  }
>  
>  void exynos5_spi_config(int peripheral)
> @@ -296,6 +306,7 @@ static int exynos5_pinmux_config(int peripheral, int flags)
>  	case PERIPH_ID_I2C7:
>  		exynos5_i2c_config(peripheral, flags);
>  		break;
> +	case PERIPH_ID_I2S0:
>  	case PERIPH_ID_I2S1:
>  		exynos5_i2s_config(peripheral);
>  		break;
> diff --git a/arch/arm/include/asm/arch-exynos/clock.h b/arch/arm/include/asm/arch-exynos/clock.h
> index 2b97b9a..d55424e 100644
> --- a/arch/arm/include/asm/arch-exynos/clock.h
> +++ b/arch/arm/include/asm/arch-exynos/clock.h
> @@ -873,11 +873,13 @@ struct set_epll_con_val {
>  #define EXYNOS5_EPLLCON0_LOCKED_SHIFT	29  /* EPLL Locked bit position*/
>  #define TIMEOUT_EPLL_LOCK		1000
>  
> -#define AUDIO_0_RATIO_MASK		0x0f
> -#define AUDIO_1_RATIO_MASK		0x0f
> +#define AUDIO_RATIO_MASK		0x0f
> +
> +#define AUDIO_SEL_MASK			0xf
>  
> -#define AUDIO1_SEL_MASK			0xf
>  #define CLK_SRC_SCLK_EPLL		0x7
> +#define CLK_SRC_MOUT_EPLL		(1<<12)
> +#define CLKMUX_ASS			(1<<0)

Please add prefix AUDIO.

>  
>  /* CON0 bit-fields */
>  #define EPLL_CON0_MDIV_MASK		0x1ff
> diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
> index cb924fb..552b64f 100644
> --- a/arch/arm/include/asm/arch-exynos/cpu.h
> +++ b/arch/arm/include/asm/arch-exynos/cpu.h
> @@ -89,6 +89,8 @@
>  /* EXYNOS5 Common*/
>  #define EXYNOS5_I2C_SPACING		0x10000
>  
> +#define EXYNOS_AUDSS			0x03810000

please fix naming. It's a exynos5 section.
AUD is far too vague. AUDIO please.

> +

please remove blank line.

>  #define EXYNOS5_GPIO_PART4_BASE		0x03860000
>  #define EXYNOS5_PRO_ID			0x10000000
>  #define EXYNOS5_CLOCK_BASE		0x10010000
> diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
> index 9952155..64bd8b7 100644
> --- a/arch/arm/include/asm/arch-exynos/periph.h
> +++ b/arch/arm/include/asm/arch-exynos/periph.h
> @@ -34,6 +34,7 @@ enum periph_id {
>  	PERIPH_ID_SDMMC1,
>  	PERIPH_ID_SDMMC2,
>  	PERIPH_ID_SDMMC3,
> +	PERIPH_ID_I2S0 = 98,
>  	PERIPH_ID_I2S1 = 99,
>  
>  	/* Since following peripherals do
> 

Thanks,
Minkyu Kang.