[U-Boot] [U-Boot,v2 6/6] sf: Set QUAD enable bit support
Jagan Teki
jagannadh.teki at gmail.com
Fri Feb 1 06:32:18 CET 2013
Hi Simon,
On Fri, Feb 1, 2013 at 10:00 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi,
>
> On Thu, Jan 31, 2013 at 10:49 AM, Jagan Teki <jagannadh.teki at gmail.com> wrote:
>> Hi Mike/Simon,
>>
>> Any further comments on this.
>
> No further comment. It looks OK to me.
>
> For all the other patches, it might be worth putting them in a single
> series and sending them again once comments are addressed.
Thanks for your quick response.
I will pack all the patches in one series and send.
Thanks,
Jagan.
>
> Acked-by: Simon Glass <sjg at chromium.org>
>
> Regards,
> Simon
>
>>
>> I have tested on real h/w target as well.
>>
>> Thanks,
>> Jagan.
>>
>> On Sun, Dec 23, 2012 at 11:23 PM, Jagan Teki <jagannadh.teki at gmail.com> wrote:
>>> Tested on real hardware, works fine.
>>>
>>> Tested-by: Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>
>>>
>>> Thanks,
>>> Jagan.
>>>
>>> On Wed, Dec 19, 2012 at 9:57 PM, Jagannadha Sutradharudu Teki
>>> <jagannadh.teki at gmail.com> wrote:
>>>> This patch provides support to set the QUAD enable bit on flash.
>>>>
>>>> QUAD enable bit needs to set before performing any QUAD IO operations
>>>> on respective SPI flashes.
>>>>
>>>> User need to use spi_flash_set_quad_enable_bit() to set the
>>>> QUAD enable bit based on their usage.
>>>>
>>>> Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki at gmail.com>
>>>> ---
>>>> Changes in v2:
>>>> Improved code logic
>>>>
>>>> drivers/mtd/spi/spi_flash.c | 31 +++++++++++++++++++++++++++++++
>>>> drivers/mtd/spi/spi_flash_internal.h | 4 ++++
>>>> 2 files changed, 35 insertions(+), 0 deletions(-)
>>>>
>>>> diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
>>>> index 5bddde4..675a0bf 100644
>>>> --- a/drivers/mtd/spi/spi_flash.c
>>>> +++ b/drivers/mtd/spi/spi_flash.c
>>>> @@ -329,6 +329,37 @@ int spi_flash_cmd_read_config(struct spi_flash *flash, void *data)
>>>> return 0;
>>>> }
>>>>
>>>> +int spi_flash_set_quad_enable_bit(struct spi_flash *flash)
>>>> +{
>>>> + u8 data = 0, write_done = 0;
>>>> + int ret, pass;
>>>> +
>>>> + for (pass = 0; pass < 2; pass++) {
>>>> + ret = spi_flash_cmd_read_config(flash, (void *)&data);
>>>> + if (ret < 0) {
>>>> + debug("SF: fail to read config register\n");
>>>> + return ret;
>>>> + }
>>>> +
>>>> + if (data & STATUS_QEB) {
>>>> + debug("SF: quad enable bit is set.\n");
>>>> + return ret;
>>>> + } else if (write_done != 1) {
>>>> + debug("SF: need to set quad enable bit\n");
>>>> +
>>>> + write_done = 1;
>>>> + ret = spi_flash_cmd_write_config(flash, STATUS_QEB);
>>>> + if (ret < 0) {
>>>> + debug("SF: fail to write quad enable bit\n");
>>>> + return ret;
>>>> + }
>>>> + }
>>>> + }
>>>> +
>>>> + debug("SF: fail to set quad enable bit\n");
>>>> + return -1;
>>>> +}
>>>> +
>>>> /*
>>>> * The following table holds all device probe functions
>>>> *
>>>> diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
>>>> index 844e82e..15c7ac4 100644
>>>> --- a/drivers/mtd/spi/spi_flash_internal.h
>>>> +++ b/drivers/mtd/spi/spi_flash_internal.h
>>>> @@ -31,6 +31,7 @@
>>>>
>>>> /* Common status */
>>>> #define STATUS_WIP 0x01
>>>> +#define STATUS_QEB 0x02
>>>>
>>>> /* Send a single-byte command to the device and read the response */
>>>> int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
>>>> @@ -87,6 +88,9 @@ int spi_flash_cmd_write_config(struct spi_flash *flash, u8 cr);
>>>> /* Read the config register */
>>>> int spi_flash_cmd_read_config(struct spi_flash *flash, void *data);
>>>>
>>>> +/* Set the QUAD enable bit */
>>>> +int spi_flash_set_quad_enable_bit(struct spi_flash *flash);
>>>> +
>>>> /*
>>>> * Same as spi_flash_cmd_read() except it also claims/releases the SPI
>>>> * bus. Used as common part of the ->read() operation.
>>>> --
>>>> 1.7.0.4
>>>>
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