[U-Boot] [PATCH v5 3/4] Tegra: fdt: Add/enhance sdhci (mmc) nodes for all T20 DT files

[Stephen Warren]

On 02/20/2013 02:05 PM, Tom Warren wrote:
> Linux dts files were used for those boards that didn't already
> have sdhci info populated. Tamonten has their own dtsi file with
> common sdhci nodes (sourced from Linux).

So this patch now does a two unrelated things:

a) Switches from /include/ to #include.
b) A bunch of changes for the SDHCI properties.

Those should really be separate patches.

> diff --git a/board/compal/dts/tegra20-paz00.dts b/board/compal/dts/tegra20-paz00.dts

> -/include/ ARCH_CPU_DTS
> +#include ARCH_CPU_DTS

I think we should get rid of ARCH_CPU_DTS too. The only reason it ever
existed was because we were using dtc's include processing and had to
work around some issue with that (I can't remember exactly what, but
Simon will). Now that we're using cpp's include processing, we can
simply write:

#include "tegra20.dtsi".

> diff --git a/board/nvidia/dts/tegra20-seaboard.dts b/board/nvidia/dts/tegra20-seaboard.dts

>  /memreserve/ 0x1c000000 0x04000000;

Unrelated to this series, but we should remove that line. It's unlikely
to be remotely correct.

>  	sdhci at c8000400 {
> +		status = "okay";
>  		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
>  		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
>  		power-gpios = <&gpio 70 0>; /* gpio PI6 */
> +		bus-width = <4>;
>  	};

In an earlier version of these patches, I think you'd made the cd-gpios
flags be "3" not "0", and I'd pointed out that doesn't match the
kernel's. It turns out that on most (if not all) boards, cd-gpios should
actually be marked active-low, so the flags should likely be "1" (not 3;
bit 1 isn't defined to mean anything). This is true for all the NVIDIA
boards, and Paz00 and TrimSlice. Joseph Lo is waiting for confirmation
from Thierry and Lucas on their boards before re-spinning the patch to
update them too.

See:
http://www.spinics.net/lists/linux-mmc/msg19134.html
http://www.spinics.net/lists/linux-mmc/msg19139.html

> diff --git a/board/nvidia/dts/tegra30-cardhu.dts b/board/nvidia/dts/tegra30-cardhu.dts

>  /memreserve/ 0x1c000000 0x04000000;

Same here, except that value is definitely always incorrect; memory
starts at 0x80000000 on Tegra30, so that range never matches memory.