[U-Boot] [PATCH] Initialise correct GPMC WAITx irq for AM33xx
Peter Korsgaard
jacmet at sunsite.dk
Thu Feb 21 14:04:29 CET 2013
>>>>> "Mark" == Mark Jackson <mpfj-list at mimc.co.uk> writes:
Mark> Currently WAIT0 irq is reset and then WAIT1 irq is enabled.
Mark> Fix it such that WAIT0 irq is enabled instead.
Mark> Signed-off-by: Mark Jackson <mpfj at newflow.co.uk>
Mark> ---
Mark> arch/arm/cpu/armv7/am33xx/mem.c | 2 +-
Mark> 1 file changed, 1 insertion(+), 1 deletion(-)
Mark> diff --git a/arch/arm/cpu/armv7/am33xx/mem.c b/arch/arm/cpu/armv7/am33xx/mem.c
Mark> index b8f54ab..b86b0de 100644
Mark> --- a/arch/arm/cpu/armv7/am33xx/mem.c
Mark> +++ b/arch/arm/cpu/armv7/am33xx/mem.c
Mark> @@ -83,7 +83,7 @@ void gpmc_init(void)
Mark> /* global settings */
Mark> writel(0x00000008, &gpmc_cfg->sysconfig);
Mark> writel(0x00000100, &gpmc_cfg->irqstatus);
Mark> - writel(0x00000200, &gpmc_cfg->irqenable);
Mark> + writel(0x00000100, &gpmc_cfg->irqenable);
Acked-by: Peter Korsgaard <jacmet at sunsite.dk>
Why do we even enable the irq in the first place? The gpmc driver just
polls irqstatus anyway.
--
Bye, Peter Korsgaard
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