[U-Boot] [PATCH 1/3] ARM: implement some Cortex-A9 errata workarounds

[Simon Glass]

On Tue, Feb 26, 2013 at 2:28 PM, Stephen Warren <swarren at wwwdotorg.org> wrote:
> From: Stephen Warren <swarren at nvidia.com>
>
> Various errata exist in the Cortex-A9 CPU, and may be worked around by
> setting some bits in a CP15 diagnostic register. Add code to implement
> the workarounds, enabled by new CONFIG_ options.
>
> This code was taken from the Linux kernel, v3.8, arch/arm/mm/proc-v7.S,
> and modified to remove the logic to conditionally apply the WAR (since we
> know exactly which CPU we're running on given the U-Boot configuration),
> and use r0 instead of r10 for consistency with the rest of U-Boot's
> cpu_init_cp15().
>
> Signed-off-by: Stephen Warren <swarren at nvidia.com>

Acked-by: Simon Glass <sjg at chromium.org>

Good to have. Although I wonder why we wouldn't want to probe it in
U-Boot as with Linux?

> ---
>  README                     |   10 ++++++++++
>  arch/arm/cpu/armv7/start.S |   19 +++++++++++++++++++
>  2 files changed, 29 insertions(+)
>
> diff --git a/README b/README
> index d8cb394..f2b1c88 100644
> --- a/README
> +++ b/README
> @@ -485,6 +485,16 @@ The following options need to be configured:
>                 Thumb2 this flag will result in Thumb2 code generated by
>                 GCC.
>
> +               CONFIG_ARM_ERRATA_742230
> +               CONFIG_ARM_ERRATA_743622
> +               CONFIG_ARM_ERRATA_751472
> +
> +               If set, the workarounds for these ARM errata are applied early
> +               during U-Boot startup. Note that these options force the
> +               workarounds to be applied; no CPU-type/version detection
> +               exists, unlike the similar options in the Linux kernel. Do not
> +               set these options unless they apply!
> +
>  - Linux Kernel Interface:
>                 CONFIG_CLOCKS_IN_MHZ
>
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index 6b59529d..30f02d3 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -309,6 +309,25 @@ ENTRY(cpu_init_cp15)
>         orr     r0, r0, #0x00001000     @ set bit 12 (I) I-cache
>  #endif
>         mcr     p15, 0, r0, c1, c0, 0
> +
> +#ifdef CONFIG_ARM_ERRATA_742230
> +       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
> +       orr     r0, r0, #1 << 4         @ set bit #4
> +       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
> +#endif
> +
> +#ifdef CONFIG_ARM_ERRATA_743622
> +       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
> +       orr     r0, r0, #1 << 6         @ set bit #6
> +       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
> +#endif
> +
> +#ifdef CONFIG_ARM_ERRATA_751472
> +       mrc     p15, 0, r0, c15, c0, 1  @ read diagnostic register
> +       orr     r0, r0, #1 << 11        @ set bit #11
> +       mcr     p15, 0, r0, c15, c0, 1  @ write diagnostic register
> +#endif
> +
>         mov     pc, lr                  @ back to my caller
>  ENDPROC(cpu_init_cp15)
>
> --
> 1.7.10.4
>