[U-Boot] [PATCH] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source

[Marek Vasut]

Dear Fabio Estevam,

> From: Fabio Estevam <fabio.estevam at freescale.com>
> 
> Currently the following kernel hang happens when loading a 2.6.35 kernel
> from Freeescale on a mx28evk board:
> 
> RPC: Registered tcp transport module.
> RPC: Registered tcp NFSv4.1 backchannel transport module.
> Bus freq driver module loaded
> IMX usb wakeup probe
> usb h1 wakeup device is registered
> mxs_cpu_init: cpufreq init finished
> ...
> 
> Loading the same kernel using the bootlets from the
> imx-bootlets-src-10.12.01 package, the hang does not occur.
> 
> Comparing the DDR2 initialization from the bootlets code against the U-boot
> one, we can notice some mismatches, and after applying the same
> initialization into U-boot the 2.6.35 kernel can boot normally.
> 
> Also tested with 'mtest' command, which runs succesfully.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> ---
>  arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c |   87
> ++++++++++++++--------------- 1 file changed, 43 insertions(+), 44
> deletions(-)
> 
> diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c index f8392f6..d80746f 100644
> --- a/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> +++ b/arch/arm/cpu/arm926ejs/mxs/spl_mem_init.c
> @@ -36,55 +36,54 @@ static uint32_t dram_vals[] = {
>   * i.MX28 DDR2 at 200MHz
>   */

The patch contains mixed tabs and spaces. It is very tough to find the actual 
difference. Can you please reduce the patch to minimum? Can you also describe 
exactly what changed so I can verify this on other boards?