[U-Boot] [RFC] ARM: omap3: Add option to disable errata workarounds.

[Albert ARIBAUD]

Hi Andreas,

On Tue, 09 Jul 2013 10:08:10 +0200, Andreas Naumann <dev at andin.de>
wrote:

> Hi,
> 
> It seems that all three ARM errata workarounds done in omap3 board-init 
> (#454179 #430973 #621766) are solved/not longer needed e.g. in the 
> AM/DM37xx chips. Other people have noticed this:
> http://e2e.ti.com/support/arm/sitara_arm/f/791/t/254742.aspx
> 
> When still applying them (especcially #430973), lots of segmentations 
> faults and other strange stuff begin to appear.
> So as a simple solution I propose adding a config option to remove these 
> workarounds for boards/silicon that dont need them. Is this sensible or 
> should there be more automatism?
> 
> 
> regards,
> Andreas
> 
> 
> PS. Does anybody have the "ARM Core Cortex-A8 (AT400/AT401) errata" 
> document to make sure my assumption above holds true?
> 
> 
> 
> ---
>   arch/arm/cpu/armv7/omap3/board.c | 2 ++
>   1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm/cpu/armv7/omap3/board.c 
> b/arch/arm/cpu/armv7/omap3/board.c
> index b72fadc..84045d8 100644
> --- a/arch/arm/cpu/armv7/omap3/board.c
> +++ b/arch/arm/cpu/armv7/omap3/board.c
> @@ -236,8 +236,10 @@ void s_init(void)
> 
>   	try_unlock_memory();
> 
> +#ifndef CONFIG_SYS_DISABLE_CORTEXA8_ERRATA_WORKAROUNDS
>   	/* Errata workarounds */
>   	omap3_setup_aux_cr();
> +#endif
> 
>   #ifndef CONFIG_SYS_L2CACHE_OFF
>   	/* Invalidate L2-cache from secure mode */

Two remarks:

1. I would prefer the option to be the other way around, i.e. forcing
the inclusion of the workaround when defined rather than when not
defined; e.g. CONFIG_SYS_CORTEXA8_WORK_AROUND_ERRATA

2. (if applicable) I would prefer erratum-specific options, e.g.
CONFIG_SYS_CORTEXA8_WORK_AROUND_ERRATUM_430973 -- ok, "ERRATA" will be
fine too; what I want is easing the search for errata by number.

Amicalement,
-- 
Albert.