[U-Boot] [PATCH 1/2] ARM: tegra: Make cache line size SoC specific

[Stephen Warren]

On 07/18/2013 08:38 PM, Thierry Reding wrote:
> On Thu, Jul 18, 2013 at 03:19:18PM -0600, Stephen Warren wrote:
>> On 07/18/2013 01:13 PM, Thierry Reding wrote:
>>> From: Thierry Reding <treding at nvidia.com>
>>> 
>>> Currently all Tegra SoCs are assumed to have 32 byte cache
>>> lines. This isn't true for Tegra114, however, which uses 4
>>> Cortex-A15 cores and therefore uses a cache line size of 64
>>> bytes. Move the cache line size setting to the per-SoC common
>>> configuration file.
>> 
>> Tested-by: Stephen Warren <swarren at nvidia.com> Reviewed-by:
>> Stephen Warren <swarren at nvidia.com>
> 
> Do these apply to patch 2 of this series as well?

Yes, the whole series.