[U-Boot] Ethernet support broken for Wandboard Quad on master

[Fabio Estevam]

On Fri, Jul 19, 2013 at 7:25 AM, Sascha Silbe <t-uboot at infra-silbe.de> wrote:
> Hello Charles,
>
> [CC += a few people that were CC'ed on the revert of Charles' patch]
>
> Charles Coldwell <coldwell at gmail.com> writes:
>
>> I've never heard of the Wandboard Quad, so I suppose the short answer
>> is "no".  However, the philosophy of the patch I submitted was:
> [...]
>
> Thanks for the description and the pointer to the Xilinx register
> description. I think I got to the bottom of it.
>
> The Xilinx PHY supports the GMII basic register set (registers 0, 1 and
> 15), but not the full extended register set (registers 2-14). Especially
> the MASTER-SLAVE Control and Status registers (IEEE 802.3 terminology)
> are missing. Bit 0 (Extended Capability) of the (non-Extended) Status
> register is correctly set to 0 to indicate this lack of support.
>
> Without the MASTER-SLAVE Status register, we can't tell whether the
> _peer_ also supports 1Gbps operation. Your patch ends up enabling it
> anyway, even for 10/100Mbps peers.
>
> Can you try the patch below, please? It restricts Extended Status
> processing to the PHYs that don't support the MASTER-SLAVE Control and
> Status registers, like the Xilinx one you use. The other PHYs should
> continue to work as before your patch. Tested successfully on Wandboard
> Quad.

Thanks for your detailed analysis, Sascha.

On a mx6qsabresd:

Tested-by: Fabio Estevam <fabio.estevam at freescale.com>

Hopefully we can get it applied into the upcoming 2013.07 in order to
avoid the regression on some mx6 boards.