[U-Boot] [PATCH 3/3] zynq: Enable axi ethernet and emaclite driver initialization

[Michal Simek]

Zynq can have axi ethernet and emaclite IPs in programmable
logic.

Signed-off-by: Michal Simek <michal.simek at xilinx.com>

---
 board/xilinx/zynq/board.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/board/xilinx/zynq/board.c b/board/xilinx/zynq/board.c
index 61a96b8..f9766a1 100644
--- a/board/xilinx/zynq/board.c
+++ b/board/xilinx/zynq/board.c
@@ -77,6 +77,23 @@ int board_eth_init(bd_t *bis)
 {
 	u32 ret = 0;

+#ifdef CONFIG_XILINX_AXIEMAC
+	ret |= xilinx_axiemac_initialize(bis, XILINX_AXIEMAC_BASEADDR,
+						XILINX_AXIDMA_BASEADDR);
+#endif
+#ifdef CONFIG_XILINX_EMACLITE
+	u32 txpp = 0;
+	u32 rxpp = 0;
+# ifdef CONFIG_XILINX_EMACLITE_TX_PING_PONG
+	txpp = 1;
+# endif
+# ifdef CONFIG_XILINX_EMACLITE_RX_PING_PONG
+	rxpp = 1;
+# endif
+	ret |= xilinx_emaclite_initialize(bis, XILINX_EMACLITE_BASEADDR,
+			txpp, rxpp);
+#endif
+
 #if defined(CONFIG_ZYNQ_GEM)
 # if defined(CONFIG_ZYNQ_GEM0)
 	ret |= zynq_gem_initialize(bis, ZYNQ_GEM_BASEADDR0,
--
1.8.2.3

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