[U-Boot] [PATCH 1/4] Exynos: Add hardware accelerated SHA 256
Kim Phillips
kim.phillips at freescale.com
Mon Mar 4 23:04:26 CET 2013
On Fri, 1 Mar 2013 16:11:36 +0000
Akshay Saraswat <akshay.s at samsung.com> wrote:
> Samsung Enterprise Portal mySingle
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>
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> Hi Kim,
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> >On Thu, 28 Feb 2013 11:08:21 +0000
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> >Akshay Saraswat <akshay.s at samsung.com> wrote:
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> >
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> >> >On Wed, 27 Feb 2013 10:24:39 -0500
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> >>
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> >> >Akshay Saraswat <akshay.s at samsung.com> wrote:
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> >
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> >can you fix your mailer to not double space lines?
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> Sorry for the disarranged text. I hope this time it is good.
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>
As you can see, no. It looks like you didn't change anything. I
have to manually single-space things below.
> >> So, I have incremented this value
> >> to 500 which shall be good enough for the lowest of all frequencies. But I guess what we
> >> need here is some formula, to calculate timeout on the basis of frequency, which is nowhere
> >> defined.
>
> >That's odd - I see a bunch of frequencies advertised in
> >arch/arm/cpu/armv7/exynos/clock.c.
> >Or how about using a cycle counter instead?
> >btw, where can I find documentation for the ACE?
>
> I tried with different frequencies and data sizes and found that it takes 2 to 3 msecs in all the cases.
> Since, it is hardware accelerated encoding it is supposed to behave in this same manner.
> But the current version of u-boot behaves mysteriously and slow downs when pressed enter for long.
> In the above case mentioned I even saw time took to be more than 100 msecs for all the cases.
> I think it would not be a better idea to timeout encoding acceleration.
> But still if it is needed, cycle counter suggestion would be a great solution.
it depends on whether the h/w can fault during its operation.
> You can read Exynos5250 manual's "Security subsystem" section, which I referred for this.
you mean this?:
http://www.samsung.com/global/business/semiconductor/file/product/Exynos_5_Dual_User_Manaul_Public_REV100-0.pdf
There is no "Security subsystem" section.
Kim
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