[U-Boot] [PATCH v2] mxs: spl_mem_init: Align DDR2 init with FSL bootlets source

[Otavio Salvador]

On Thu, Feb 28, 2013 at 7:59 PM, Fabio Estevam <festevam at gmail.com> wrote:
> From: Fabio Estevam <fabio.estevam at freescale.com>
>
> Currently the following kernel hang happens when loading a 2.6.35 kernel from
> Freeescale on a mx28evk board:
>
> RPC: Registered tcp transport module.
> RPC: Registered tcp NFSv4.1 backchannel transport module.
> Bus freq driver module loaded
> IMX usb wakeup probe
> usb h1 wakeup device is registered
> mxs_cpu_init: cpufreq init finished
> ...
>
> Loading the same kernel using the bootlets from the imx-bootlets-src-10.12.01
> package, the hang does not occur.
>
> Comparing the DDR2 initialization from the bootlets code against the U-boot
> one, we can notice some mismatches, and after applying the same initialization
> into U-boot the 2.6.35 kernel can boot normally.
>
> Also tested with 'mtest' command, which runs succesfully.
>
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>

Acked-by: Otavio Salvador <otavio at ossystems.com.br>

-- 
Otavio Salvador                             O.S. Systems
E-mail: otavio at ossystems.com.br  http://www.ossystems.com.br
Mobile: +55 53 9981-7854              http://projetos.ossystems.com.br