[U-Boot] [PATCH 1/2] ARM: implement erratum 716044 workaround

[Tom Warren]

Albert,

> -----Original Message-----
> From: Stephen Warren [mailto:swarren at wwwdotorg.org]
> Sent: Monday, March 04, 2013 4:30 PM
> To: u-boot at lists.denx.de; Albert Aribaud
> Cc: Simon Glass; Tom Warren; Stephen Warren
> Subject: [PATCH 1/2] ARM: implement erratum 716044 workaround

This patchset from Stephen (includes "2/2 ARM: tegra: enable workaround for ARM erratum 716044") are both assigned to you in PatchWork, but haven't been applied yet to ARM/master AFAICT. I found them when I was searching for unapplied Tegra patches.

Could you please take this in thru the ARM tree ASAP?

Thanks,

Tom
> 
> From: Stephen Warren <swarren at nvidia.com>
> 
> Add common code to enable the workaround for ARM erratum 716044. This
> will be enabled for Tegra.
> 
> Signed-off-by: Stephen Warren <swarren at nvidia.com>
> ---
> This depends on my previous ARM errata series. I found out we needed
> another one after I wrote the first series.
> 
>  README                     |    1 +
>  arch/arm/cpu/armv7/start.S |    6 ++++++
>  2 files changed, 7 insertions(+)
> 
> diff --git a/README b/README
> index f2b1c88..97ef9f0 100644
> --- a/README
> +++ b/README
> @@ -485,6 +485,7 @@ The following options need to be configured:
>  		Thumb2 this flag will result in Thumb2 code generated by
>  		GCC.
> 
> +		CONFIG_ARM_ERRATA_716044
>  		CONFIG_ARM_ERRATA_742230
>  		CONFIG_ARM_ERRATA_743622
>  		CONFIG_ARM_ERRATA_751472
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S index
> 30f02d3..6834ffe 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -310,6 +310,12 @@ ENTRY(cpu_init_cp15)  #endif
>  	mcr	p15, 0, r0, c1, c0, 0
> 
> +#ifdef CONFIG_ARM_ERRATA_716044
> +	mrc	p15, 0, r0, c1, c0, 0	@ read system control register
> +	orr	r0, r0, #1 << 11	@ set bit #11
> +	mcr	p15, 0, r0, c1, c0, 0	@ write system control register
> +#endif
> +
>  #ifdef CONFIG_ARM_ERRATA_742230
>  	mrc	p15, 0, r0, c15, c0, 1	@ read diagnostic register
>  	orr	r0, r0, #1 << 4		@ set bit #4
> --
> 1.7.10.4
--
nvpublic