[U-Boot] [PATCH 07/23] T4/serdes: fix the serdes clock frequency display

York Sun yorksun at freescale.com
Fri Mar 22 18:15:15 CET 2013


From: Roy Zang <tie-fei.zang at freescale.com>

Reverse the bit sequence to display serdes clock frequency correctly.
The correct bit maps in BRDCFG2 are
0	1	2	3	4	5	6	7
S1RATE[1:0]	S2RATE[1:0] 	S3RATE[1:0] 	S4RATE[1:0]

Signed-off-by: Roy Zang <tie-fei.zang at freescale.com>
---
 board/freescale/t4qds/t4qds.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/board/freescale/t4qds/t4qds.c b/board/freescale/t4qds/t4qds.c
index 3c95f3f..e8c6998 100644
--- a/board/freescale/t4qds/t4qds.c
+++ b/board/freescale/t4qds/t4qds.c
@@ -110,7 +110,7 @@ int checkboard(void)
 	for (i = 0; i < MAX_SERDES; i++) {
 		static const char *freq[] = {
 			"100", "125", "156.25", "161.1328125"};
-		unsigned int clock = (sw >> (2 * i)) & 3;
+		unsigned int clock = (sw >> (6 - 2 * i)) & 3;
 
 		printf("SERDES%u=%sMHz ", i+1, freq[clock]);
 	}
-- 
1.7.9.5




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