[U-Boot] [PATCH 09/21] net/phy: add VSC8574 support

[Wolfgang Denk]

Dear York Sun,

In message <1363973052-25918-7-git-send-email-yorksun at freescale.com> you wrote:
> From: Shaohui Xie <Shaohui.Xie at freescale.com>
> 
> The VSC8574 is a quad-port Gigabit Ethernet transceiver with four SerDes
> interfaces for quad-port dual media capability. This driver supports SGMII
> and QSGMII MAC mode. For now SGMII mode is tested.
> 
> Signed-off-by: Roy Zang <tie-fei.zang at freescale.com>
> Signed-off-by: Shaohui Xie <Shaohui.Xie at freescale.com>
> ---
>  drivers/net/phy/vitesse.c |   67 +++++++++++++++++++++++++++++++++++++++++++++
>  include/phy.h             |    2 ++
>  2 files changed, 69 insertions(+)

CHECK: Alignment should match open parenthesis
#151: FILE: drivers/net/phy/vitesse.c:166:
+       phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
+                       PHY_EXT_PAGE_ACCESS_GENERAL);

CHECK: Alignment should match open parenthesis
#158: FILE: drivers/net/phy/vitesse.c:173:
+               phy_write(phydev, MDIO_DEVAD_NONE,
+                               MIIM_VSC8574_GENERAL19, val);

CHECK: Alignment should match open parenthesis
#161: FILE: drivers/net/phy/vitesse.c:176:
+               phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18,
+                               MIIM_VSC8574_18G_QSGMII);

CHECK: Alignment should match open parenthesis
#168: FILE: drivers/net/phy/vitesse.c:183:
+               phy_write(phydev, MDIO_DEVAD_NONE, MIIM_VSC8574_GENERAL18,
+                               MIIM_VSC8574_18G_SGMII);

CHECK: Alignment should match open parenthesis
#177: FILE: drivers/net/phy/vitesse.c:192:
+       phy_write(phydev, MDIO_DEVAD_NONE, PHY_EXT_PAGE_ACCESS,
+                       PHY_EXT_PAGE_ACCESS_EXTENDED3);


Best regards,

Wolfgang Denk

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