[U-Boot] [PATCH 4/5] mx6: crm_regs: Fix MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED

[Fabio Estevam]

From: Fabio Estevam <fabio.estevam at freescale.com>

According to the Reference Manual the 'mask_periph2_clk_sel_loaded' field of 
register CCM_CIMR corresponds to bit 19 so fix its definition accordingly.

Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
---
 arch/arm/include/asm/arch-mx6/crm_regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/include/asm/arch-mx6/crm_regs.h b/arch/arm/include/asm/arch-mx6/crm_regs.h
index e1cdcec..9a7fb34 100644
--- a/arch/arm/include/asm/arch-mx6/crm_regs.h
+++ b/arch/arm/include/asm/arch-mx6/crm_regs.h
@@ -469,7 +469,7 @@ struct mxc_ccm_reg {
 #define MXC_CCM_CIMR_MASK_PERIPH_CLK_SEL_LOADED		(1 << 22)
 #define MXC_CCM_CIMR_MASK_MMDC_CH1_PODF_LOADED		(1 << 21)
 #define MXC_CCM_CIMR_MASK_AHB_PODF_LOADED		(1 << 20)
-#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED	(1 << 22)
+#define MXC_CCM_CIMR_MASK_PERIPH2_CLK_SEL_LOADED	(1 << 19)
 #define MXC_CCM_CIMR_MASK_AXI_PODF_LOADED		(1 << 17)
 #define MXC_CCM_CIMR_MASK_COSC_READY			(1 << 6)
 #define MXC_CCM_CIMR_MASK_LRF_PLL			1
-- 
1.8.3.2