[U-Boot] [PATCH v2 08/16] sunxi: dram: Re-introduce the impedance calibration ond ODT

Ian Campbell ijc at hellion.org.uk
Tue Aug 5 08:47:05 CEST 2014


On Sun, 2014-08-03 at 05:32 +0300, Siarhei Siamashka wrote:
> The DRAM controller allows to configure impedance either by using the
> calibration against an external high precision 240 ohm resistor, or
> by skipping the calibration and loading pre-defined data. The DRAM
> controller register guide is available here:
> 
>     http://linux-sunxi.org/A10_DRAM_Controller_Register_Guide#SDR_ZQCR0
> 
> The new code supports both of the impedance configuration modes:
>    - If the higher bits of the 'zq' parameter in the 'dram_para' struct
>      are zero, then the lowest 8 bits are used as the ZPROG value, where
>      two divisors encoded in lower and higher 4 bits. One divisor is
>      used for calibrating the termination impedance, and another is used
>      for the output impedance.
>    - If bits 27:8 in the 'zq' parameters are non-zero, then they are
>      used as the pre-defined ZDATA value instead of performing the ZQ
>      calibration.
> 
> Two lowest bits in the 'odt_en' parameter enable ODT for the DQ and DQS
> lines individually. Enabling ODT for both DQ and DQS means that the
> 'odt_en' parameter needs to be set to 3.
> 
> Signed-off-by: Siarhei Siamashka <siarhei.siamashka at gmail.com>

Acked-by: Ian Campbell <ijc at hellion.org.uk>




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