[U-Boot] [PATCH] pci: mx6: fix occasional link failures
Fabio Estevam
festevam at gmail.com
Fri Aug 8 17:35:23 CEST 2014
On Fri, Aug 8, 2014 at 10:33 AM, Marek Vasut <marex at denx.de> wrote:
> Can you guys test it on FSL hardware ?
Sure, I am running u-boot-imx with Tim's patch applied and this
additional debug patch that shows the number of reboots and PCI
linkups:
drivers/pci/pcie_imx.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/pci/pcie_imx.c b/drivers/pci/pcie_imx.c
index a3982c4..1ee77f9 100644
--- a/drivers/pci/pcie_imx.c
+++ b/drivers/pci/pcie_imx.c
@@ -20,6 +20,8 @@
#include <linux/sizes.h>
#include <errno.h>
+#define DEBUG
+
#define PCI_ACCESS_READ 0
#define PCI_ACCESS_WRITE 1
@@ -573,6 +575,10 @@ void imx_pcie_init(void)
static struct pci_controller pcc;
struct pci_controller *hose = &pcc;
int ret;
+#ifdef DEBUG
+ u32 dbg_reg_addr = 0x020cc068;
+ u32 dbg_reg = readl(dbg_reg_addr) + 1;
+#endif
memset(&pcc, 0, sizeof(pcc));
@@ -607,7 +613,14 @@ void imx_pcie_init(void)
if (!ret) {
pci_register_hose(hose);
hose->last_busno = pci_hose_scan(hose);
+#ifdef DEBUG
+ dbg_reg += 1<<16;
+#endif
}
+#ifdef DEBUG
+ writel(dbg_reg, dbg_reg_addr);
+ printf("PCIe Successes/Attempts: %d/%d\n", dbg_reg >> 16, dbg_reg
& 0xffff);
+#endif
}
Then I do:
=> setenv bootcmd reset
=> save
=> reboot
,connect an Intel Wifi 7260HMW card to the mx6qsabresd and let the
system rebooting in loop.
It has been running with no PCI linkup failures here:
U-Boot 2014.07-16451-g7496820-dirty (Aug 08 2014 - 11:34:13)
CPU: Freescale i.MX6Q rev1.1 at 792 MHz
Reset cause: WDOG
Board: MX6-SabreSD
I2C: ready
DRAM: 1 GiB
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
00:01.0 - 16c3:abcd - Bridge device
01:00.0 - 8086:08b1 - Network controller
PCIe Successes/Attempts: 2350/2350
No panel detected: default to Hannstar-XGA
Display: Hannstar-XGA (1024x768)
In: serial
Out: serial
Err: serial
PMIC: PFUZE100 ID=0x10
Net: FEC [PRIME]
So here goes my:
Tested-by: Fabio Estevam <fabio.estevam at freescale.com>
Regards,
Fabio Estevam
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