[U-Boot] [U-boot] [Patch] ARM: keystone: clock: use correct BWADJ field mask for PASSPLLCTL0

[Ivan Khoronzhuk]

The mask for BWADJ field of PASSPLLCTL0 register has to be 0xff, but
by mistake, here is used shift instead of mask, so correct it.

Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk at ti.com>
---

Based on
[U-boot] [Patch] keystone2: use EFUSE_BOOTROM information to
configure PLLs
http://patchwork.ozlabs.org/patch/373790

 arch/arm/cpu/armv7/keystone/clock.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/cpu/armv7/keystone/clock.c b/arch/arm/cpu/armv7/keystone/clock.c
index 30d76a6..47fc893 100644
--- a/arch/arm/cpu/armv7/keystone/clock.c
+++ b/arch/arm/cpu/armv7/keystone/clock.c
@@ -174,7 +174,7 @@ void init_pll(const struct pll_init_data *data)
 		 * bypass disabled
 		 */
 		bwadj = pllm >> 1;
-		tmp |= ((bwadj & PLL_BWADJ_LO_SHIFT) << PLL_BWADJ_LO_SHIFT) |
+		tmp |= ((bwadj & PLL_BWADJ_LO_MASK) << PLL_BWADJ_LO_SHIFT) |
 			(pllm << PLL_MULT_SHIFT) |
 			(plld & PLL_DIV_MASK) |
 			(pllod << PLL_CLKOD_SHIFT);
-- 
1.8.3.2