[U-Boot] [RFC PATCH 0/1] SPL JTAG boot mode

Michal Simek michal.simek at xilinx.com
Mon Aug 11 15:29:46 CEST 2014


On 08/11/2014 03:17 PM, Tom Rini wrote:
> On Mon, Aug 11, 2014 at 03:03:35PM +0200, Michal Simek wrote:
> 
>> Hi,
>>
>> I have got this patch some time ago but I am not still
>> 100% sure about use case. Anyway Soren uses this mode
>> that's why let me send this patch and we can discuss
>> if this can be useful for someone else too.
>>
>> The use case is to load U-Boot SPL to do init HW
>> and then load images via JTAG because RAM is initialized
>> and then run full u-boot.
>> There is an option to do HW initialization without
>> U-Boot SPL but there are some differences and it is just
>> better to directly use code which will run on the board
>> when everything is tested.
> 
> So in this case, you attach JTAG to the board, halt on reset, reset the
> board.  JTAG load in SPL and fiddle memory so that BOOT_DEVICE_JTAG is
> set, let SPL run, 

BOOT_DEVICE_JTAG for zynq case will be setup in spl_boot_device() based on
dip-switch boot mode setup read from SLCR.

> halt when you see the print (or set a breakpoint for
> that part, either way), then load U-Boot via JTAG, resume over the while
> loop, and then debug U-Boot as needed?

In general that's my impression how Soren uses it.
I would let him to confirm that this is his use case.

Not sure if he is just loading images when cpu is in while(1) loop
and let u-boot spl continue. I can imagine that it will be just easier
to let u-boot spl end up in while loop instead of trying to find out
address for adding breakpoint.

I would let Soren or Ezra to justify this use case because I have doubts.

Thanks,
Michal



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