[U-Boot] [Patch v2 3/5] armv8/fsl-lsch3: Release secondary cores from boot hold off with Boot Page

[Mark Rutland]

Hi York,

> >> -       /*
> >> -        * All processors will enter EL2 and optionally EL1.
> >> +slave_cpu:
> >> +       wfe
> >> +#ifdef CONFIG_FSL_SMP_RELEASE_ALL
> >> +       /* All cores are released from the address in the 1st spin table
> >> +        * element
> >>          */
> >> -       bl      armv8_switch_to_el2
> >> -#ifdef CONFIG_ARMV8_SWITCH_TO_EL1
> >> -       bl      armv8_switch_to_el1
> >> +       ldr     x1, =__spin_table
> >> +       ldr     x0, [x1]
> >> +#else
> >> +       ldr     x0, [x11]
> >> +#endif
> >> +       cbz     x0, slave_cpu
> >
> > Similarly is there any reason to have the option of a single release
> > addr if we can support unique addresses?
> 
> I think it was used by Linux for some ARM parts. I personally not a fun of using
> single release.

That makes two of us. The single release address on those ARM dts is a
legacy mistake that we can't fix up without breaking some models. We
don't need to propagate that mistake to new platforms.

> But if it makes everyone happy, I can keep it.

I'd be happier with CONFIG_FSL_SMP_RELEASE_ALL dropped entirely. Ideally
U-Boot would always provide a unique cpu-release-address for each CPU. 

Thanks,
Mark.