[U-Boot] [PATCH v5 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox
Stefan Roese
sr at denx.de
Sat Aug 23 08:10:19 CEST 2014
On 22.08.2014 21:40, Fabio Estevam wrote:
> From: Fabio Estevam <fabio.estevam at freescale.com>
>
> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> Other SoCs work with the standard 32 bytes alignment.
>
> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> which addresses the needs from mx6solox and also works for the other SoCs.
>
> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
Acked-by: Stefan Roese <sr at denx.de>
Thanks,
Stefan
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