[U-Boot] [PATCH V4 10/19] arm: mx6: ddr: configure MMDC for slow_pd

[Tim Harvey]

On Mon, Aug 25, 2014 at 8:36 AM, Nikita Kiryanov <nikita at compulab.co.il> wrote:
>
> On 20/08/14 15:08, Nikita Kiryanov wrote:
>>
>> According to MX6 TRM, both MMDC and DRAM should be configured to
>> the same powerdown precharge. Currently, mx6_dram_cfg()
>> configures MMDC for fast pd (MDPDC[7] = 0), and the DRAM for
>> 'slow exit (DLL off)' (MR0[12] = 0).
>>
>> Configure MMDC for slow pd.
>>
>
> We have confirmation from a Freescale representative that the
> configurations should be aligned:
>
> https://community.freescale.com/thread/328577
>
> --
> Regards,
> Nikita Kiryanov

Nikita,

Yep...

Acked-by: Tim Harvey <tharvey at gateworks.com>

(Next I'll ask them about that delay for ZQ calibration - it bugs me
that your finding you need an extra 100us delay on your boards, but
that shouldn't hold up any of your patches)

Tim