[U-Boot] [PATCH] ARM: datacache always disabled when RAM extends to 0xFFFFFFFF

[Jaccon Bastiaansen]

The dram_bank_mmu_setup() function contains a loop to configure the data
caching policy for each 1 Mbyte page of the RAM memory range. When RAM
extends to 0xFFFFFFFF, the RAM start address + the RAM size will equal
2^32. But because the RAM start address and RAM size are unsigned longs,
the result of this addition is zero. The loop is therefore not executed
and the datacache is effectively disabled.

Signed-off-by: Jaccon Bastiaansen <jaccon.bastiaansen at gmail.com>
---
 arch/arm/lib/cache-cp15.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/lib/cache-cp15.c b/arch/arm/lib/cache-cp15.c
index 5fdfdbf..dcd881f 100644
--- a/arch/arm/lib/cache-cp15.c
+++ b/arch/arm/lib/cache-cp15.c
@@ -69,7 +69,7 @@ __weak void dram_bank_mmu_setup(int bank)
 
 	debug("%s: bank: %d\n", __func__, bank);
 	for (i = bd->bi_dram[bank].start >> 20;
-	     i < (bd->bi_dram[bank].start + bd->bi_dram[bank].size) >> 20;
+	     i < ((u64)bd->bi_dram[bank].start + (u64)bd->bi_dram[bank].size) >> 20;
 	     i++) {
 #if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
 		set_section_dcache(i, DCACHE_WRITETHROUGH);
-- 
1.7.9.5