[U-Boot] [PATCH 23/23] ARM: tegra: Enable PCIe on Jetson TK1

Tuomas Tynkkynen ttynkkynen at nvidia.com
Wed Aug 27 18:52:36 CEST 2014



On 27/08/14 17:34, Thierry Reding wrote:
[...]
>>> On my board, this call results in UART corruption, like this:
>>>
>>> tegra-pcie:   non-prefetchable memory: 0x13000000-0x20000000
>>> tegra-pcie:   prefetchable memory: 0x20000000-0x40000000
>>> ¥É½¥¹½bªÍ¥¹b2x1, 1x1 configuration
>>> ¹Í5Rþtegra-pcie: probing port 1, using 1 lanes
>>>
>>> Likely because GPIO#2 controls the +3.3V_LP0 rail, which powers the UART
>>> level shifters. Commenting the function call out fixes the corruption and
>>> PCI-E still works fine.
>>
>> If I add a udelay(500) after the above I'm not able to reproduce the
>> UART breakage anymore. But I guess making the AS3722 GPIO code smarter
>> would be helpful. In the kernel this is done by checking the invert bit
>> and then setting the value accordingly. I suppose the same could be done
>> for the mode bits. I'll see if I can work up a patch.
> 
> How about this:
[...]

Yes, that helps.

-- 
nvpublic


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