[U-Boot] [PATCH 0/8] U-Boot port to Xtensa architecture

[Max Filippov]

Hi Michal,

On Fri, Aug 29, 2014 at 3:50 PM, Michal Simek <monstr at monstr.eu> wrote:
> On 08/20/2014 07:42 PM, Max Filippov wrote:
>> this series adds U-Boot port to Xtensa, configurable processor architecture
>> from Tensilica, Inc., now Cadence Design Systems Inc.
>>
>> Preparation patches clean up OpenCores 10/100 MBit driver, enable it to be
>> used with dedicated packet memory and with gigabit PHY. Two patches add
>> proper xtensa bits: changes to shares files and contents of arch/xtensa.
>> One more patch adds sample xtensa CPU configuration -- Diamond 232.
>> One more patch adds xtfpga board family that consists of Avnet LX60, LX110
>> and LX200 and Xilinx ML605 and KC705 FPGA boards configured with xtensa
>> bitstream.
>
> Any link to bitstreams? I have ml605 and kc705 here and will be nice to test it.

The board alone is not enough to boot xtensa software, as the JTAG connector
capable of loading code into CPU goes on a separate daughterboard that plugs
into FMC connectors. I will check if I can share a bitstream and if it may be
somehow used with the FPGA board alone.

However you should be able to test with qemu, as it simulates all necessary
hardware. Some examples are listed here:
http://wiki.linux-xtensa.org/index.php/Xtensa_on_QEMU

-- 
Thanks.
-- Max