[U-Boot] [PATCH v7 1/2] net: fec_mxc: Adjust RX DMA alignment for mx6solox

Tom Rini trini at ti.com
Sat Aug 30 21:21:32 CEST 2014


On Sat, Aug 30, 2014 at 02:22:22PM -0300, Fabio Estevam wrote:
> Tom, Joe or Stefano,
> 
> On Mon, Aug 25, 2014 at 4:51 PM, Marek Vasut <marex at denx.de> wrote:
> > On Monday, August 25, 2014 at 06:34:16 PM, Fabio Estevam wrote:
> >> mx6solox has a requirement for 64 bytes alignment for RX DMA transfer.
> >> Other SoCs work with the standard 32 bytes alignment.
> >>
> >> Adjust it accordingly by using 64 bytes aligment in the FEC RX DMA buffers,
> >> which addresses the needs from mx6solox and also works for the other SoCs.
> >>
> >> Signed-off-by: Fabio Estevam <fabio.estevam at freescale.com>
> >
> > Acked-by: Marek Vasut <marex at denx.de>
> 
> Could this one be applied for 2014.10-rc?

I'd like this via the imx tree.

-- 
Tom
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