[U-Boot] [PATCH 00/25] x86: Add Intel Queensbay platform support
Bin Meng
bmeng.cn at gmail.com
Thu Dec 4 16:00:05 CET 2014
This patch series add the Intel Queensbay platform support. The Queensbay
platform includes an Atom E6xx processor (codename Tunnel Creek) and a
Platform Controller Hub EG20T (codename Topcliff). The support depends
on Intel Firmware Support Package (FSP) to initialize the processor and
chipset including system memory. With this patch series, U-Boot boots to
Linux kernel. Validated on an Intel Crown Bay board with kernel 3.17.
Note I did not clean up the original FSP codes released by Intel with
U-Boot coding convention. So there will be coding style issues reported
by the patch checkers against patch#11 and #12 in this series.
Bin Meng (25):
x86: Make ROM_SIZE configurable in Kconfig
tools/ifdtool: Support writing multiple files (-w) simultaneously
x86: Refactor u-boot.rom build rules
x86: Clean up asm-offsets
x86: ich6-gpio: Make setup_pch_gpios() a weak function
x86: Add Intel Crown Bay board dts file
x86: Add a simple superio driver for SMSC LPC47M
x86: Add Intel Topcliff PCH device IDs
x86: ich-spi: Add Intel Tunnel Creek SPI controller support
x86: ich6-gpio: Add Intel Tunnel Creek GPIO support
x86: Initial import from Intel FSP release for Queensbay platform
x86: queensbay: Adapt FSP support codes
x86: Add post failure codes for bist and car
x86: Support Intel FSP initialization path in start.S
x86: Add a simple command to show FSP HOB information
x86: Integrate Tunnel Creek processor microcode
x86: Add basic support to queensbay platform and crownbay board
x86: Add queensbay and crownbay Kconfig files
x86: Add crownbay defconfig and config.h
x86: Enable the queensbay cpu directory build
x86: Include FSP and CMC binary in the u-boot.rom build rules
x86: crownbay: Add SPI flash support
x86: crownbay: Enable Intel E1000 NIC support
x86: crownbay: Add SDHCI support
x86: Add a README.x86 for U-Boot on x86 support
Makefile | 56 +-
arch/x86/Kconfig | 91 +-
arch/x86/cpu/Makefile | 1 +
arch/x86/cpu/ivybridge/cpu.c | 1 +
arch/x86/cpu/queensbay/Kconfig | 75 ++
arch/x86/cpu/queensbay/M0220661105.inc | 1288 ++++++++++++++++++++
arch/x86/cpu/queensbay/Makefile | 9 +
arch/x86/cpu/queensbay/fsp_configs.c | 36 +
arch/x86/cpu/queensbay/fsp_support.c | 635 ++++++++++
arch/x86/cpu/queensbay/tnc.c | 72 ++
arch/x86/cpu/queensbay/tnc_car.S | 75 ++
arch/x86/cpu/queensbay/tnc_dram.c | 81 ++
arch/x86/cpu/queensbay/tnc_pci.c | 62 +
arch/x86/cpu/queensbay/topcliff.c | 44 +
arch/x86/cpu/start.S | 40 +-
arch/x86/dts/Makefile | 3 +-
arch/x86/dts/crownbay.dts | 53 +
arch/x86/include/asm/arch-ivybridge/gpio.h | 3 +
arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h | 84 ++
.../include/asm/arch-queensbay/fsp/fsp_bootmode.h | 30 +
arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h | 482 ++++++++
arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h | 223 ++++
arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h | 400 ++++++
.../asm/arch-queensbay/fsp/fsp_infoheader.h | 94 ++
.../include/asm/arch-queensbay/fsp/fsp_platform.h | 21 +
.../include/asm/arch-queensbay/fsp/fsp_support.h | 140 +++
.../x86/include/asm/arch-queensbay/fsp/fsp_types.h | 198 +++
arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h | 57 +
arch/x86/include/asm/arch-queensbay/gpio.h | 13 +
arch/x86/include/asm/global_data.h | 3 +
arch/x86/include/asm/gpio.h | 2 +-
arch/x86/include/asm/pnp_def.h | 83 ++
arch/x86/include/asm/post.h | 2 +
arch/x86/lib/Makefile | 1 +
arch/x86/lib/asm-offsets.c | 5 +-
arch/x86/lib/cmd_hob.c | 71 ++
board/google/chromebook_link/Kconfig | 1 +
board/google/chromebook_link/link.c | 40 +
board/intel/crownbay/Kconfig | 20 +
board/intel/crownbay/MAINTAINERS | 6 +
board/intel/crownbay/Makefile | 7 +
board/intel/crownbay/crownbay.c | 26 +
board/intel/crownbay/start.S | 9 +
configs/crownbay_defconfig | 6 +
doc/README.x86 | 123 ++
drivers/gpio/intel_ich6_gpio.c | 67 +-
drivers/misc/Makefile | 1 +
drivers/misc/smsc_lpc47m.c | 31 +
drivers/spi/ich.c | 3 +-
include/configs/crownbay.h | 61 +
include/pci_ids.h | 8 +
include/smsc_lpc47m.h | 19 +
lib/asm-offsets.c | 3 -
tools/ifdtool.c | 29 +-
tools/ifdtool.h | 2 +
55 files changed, 4903 insertions(+), 93 deletions(-)
create mode 100644 arch/x86/cpu/queensbay/Kconfig
create mode 100644 arch/x86/cpu/queensbay/M0220661105.inc
create mode 100644 arch/x86/cpu/queensbay/Makefile
create mode 100644 arch/x86/cpu/queensbay/fsp_configs.c
create mode 100644 arch/x86/cpu/queensbay/fsp_support.c
create mode 100644 arch/x86/cpu/queensbay/tnc.c
create mode 100644 arch/x86/cpu/queensbay/tnc_car.S
create mode 100644 arch/x86/cpu/queensbay/tnc_dram.c
create mode 100644 arch/x86/cpu/queensbay/tnc_pci.c
create mode 100644 arch/x86/cpu/queensbay/topcliff.c
create mode 100644 arch/x86/dts/crownbay.dts
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_api.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_bootmode.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_ffs.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_fv.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_hob.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_infoheader.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_platform.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_support.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_types.h
create mode 100644 arch/x86/include/asm/arch-queensbay/fsp/fsp_vpd.h
create mode 100644 arch/x86/include/asm/arch-queensbay/gpio.h
create mode 100644 arch/x86/include/asm/pnp_def.h
create mode 100644 arch/x86/lib/cmd_hob.c
create mode 100644 board/intel/crownbay/Kconfig
create mode 100644 board/intel/crownbay/MAINTAINERS
create mode 100644 board/intel/crownbay/Makefile
create mode 100644 board/intel/crownbay/crownbay.c
create mode 100644 board/intel/crownbay/start.S
create mode 100644 configs/crownbay_defconfig
create mode 100644 doc/README.x86
create mode 100644 drivers/misc/smsc_lpc47m.c
create mode 100644 include/configs/crownbay.h
create mode 100644 include/smsc_lpc47m.h
--
1.8.2.1
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