[U-Boot] [PATCH 24/25] x86: crownbay: Add SDHCI support

Bin Meng bmeng.cn at gmail.com
Fri Dec 5 14:59:10 CET 2014


Hi Simon,

On Fri, Dec 5, 2014 at 8:01 AM, Simon Glass <sjg at chromium.org> wrote:
> Hi Bin,
>
> On 4 December 2014 at 08:04, Bin Meng <bmeng.cn at gmail.com> wrote:
>> There are two standard SD card slots on the Crown Bay board, which
>> are connected to the Topcliff PCH SDIO controllers. Enable the SDHC
>> support so that we can use them.
>>
>> Signed-off-by: Bin Meng <bmeng.cn at gmail.com>
>> ---
>>  arch/x86/cpu/queensbay/Makefile   |  2 +-
>>  arch/x86/cpu/queensbay/topcliff.c | 44 +++++++++++++++++++++++++++++++++++++++
>>  include/configs/crownbay.h        |  6 ++++++
>>  3 files changed, 51 insertions(+), 1 deletion(-)
>>  create mode 100644 arch/x86/cpu/queensbay/topcliff.c
>>
>> diff --git a/arch/x86/cpu/queensbay/Makefile b/arch/x86/cpu/queensbay/Makefile
>> index ace04ca..2c2ec01 100644
>> --- a/arch/x86/cpu/queensbay/Makefile
>> +++ b/arch/x86/cpu/queensbay/Makefile
>> @@ -4,6 +4,6 @@
>>  # SPDX-License-Identifier:     GPL-2.0+
>>  #
>>
>> -obj-y += tnc_car.o tnc_dram.o tnc.o
>> +obj-y += tnc_car.o tnc_dram.o tnc.o topcliff.o
>>  obj-y += fsp_configs.o fsp_support.o
>>  obj-$(CONFIG_PCI) += tnc_pci.o
>> diff --git a/arch/x86/cpu/queensbay/topcliff.c b/arch/x86/cpu/queensbay/topcliff.c
>> new file mode 100644
>> index 0000000..4d2a24a
>> --- /dev/null
>> +++ b/arch/x86/cpu/queensbay/topcliff.c
>> @@ -0,0 +1,44 @@
>> +/*
>> + * Copyright (C) 2014, Bin Meng <bmeng.cn at gmail.com>
>> + *
>> + * SPDX-License-Identifier:    GPL-2.0+
>> + */
>> +
>> +#include <common.h>
>> +#include <errno.h>
>> +#include <malloc.h>
>> +#include <pci.h>
>> +#include <pci_ids.h>
>> +#include <sdhci.h>
>> +
>> +static struct pci_device_id mmc_supported[] = {
>> +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_0 },
>> +       { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TCF_SDIO_1 },
>> +       { }
>> +};
>> +
>> +int cpu_mmc_init(bd_t *bis)
>> +{
>> +       struct sdhci_host *mmc_host;
>> +       pci_dev_t devbusfn;
>> +       u32 iobase;
>> +       int i;
>> +
>> +       for (i = 0; i < 2; i++) {
>
> What is 2? Is it ARRAY_SIZE(mmc_supported)?

Yes, will change it to that.

>> +               devbusfn =  pci_find_devices(mmc_supported, i);
>> +               if (devbusfn == -1)
>> +                       return -ENODEV;
>> +
>> +               mmc_host = (struct sdhci_host *)malloc(sizeof(struct sdhci_host));
>> +               if (!mmc_host)
>> +                       return -ENOMEM;
>> +
>> +               mmc_host->name = "Topcliff SDHCI";
>> +               pci_read_config_dword(devbusfn, PCI_BASE_ADDRESS_0, &iobase);
>> +               mmc_host->ioaddr = (void *)iobase;
>> +               mmc_host->quirks = 0;
>> +               add_sdhci(mmc_host, 0, 0);
>
> Please check error retrun.

OK.

[snip]

Regards,
Bin


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